2023-03-28 12:39:00 +00:00
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/*
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* Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
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* Copyright (C) 2023 Bernd Herzog
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "w25q80bv.hpp"
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#include "debug.hpp"
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namespace w25q80bv {
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2023-05-18 20:16:05 +00:00
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void disable_spifi() {
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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2023-03-28 12:39:00 +00:00
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}
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2023-05-18 20:16:05 +00:00
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void initialite_spi() {
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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palOutputPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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const uint32_t clock_prescale_rate = 2;
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const uint32_t serial_clock_rate = 2;
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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SSP_CR1(SSP0_BASE) = 0;
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SSP_CPSR(SSP0_BASE) = clock_prescale_rate;
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SSP_CR0(SSP0_BASE) = (serial_clock_rate << 8) | SSP_DATA_8BITS;
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SSP_CR1(SSP0_BASE) = SSP_ENABLE;
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2023-03-28 12:39:00 +00:00
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}
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void setup() {
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2023-05-18 20:16:05 +00:00
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/* Init SPIFI GPIO to Normal GPIO */
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MMIO32(PIN_GROUP3 + PIN3) = (SCU_SSP_IO | SCU_CONF_FUNCTION2);
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MMIO32(PIN_GROUP3 + PIN4) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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MMIO32(PIN_GROUP3 + PIN5) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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MMIO32(PIN_GROUP3 + PIN6) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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MMIO32(PIN_GROUP3 + PIN7) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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MMIO32(PIN_GROUP3 + PIN8) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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/* configure SSP pins */
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MMIO32(SCU_SSP0_CIPO) = (SCU_SSP_IO | SCU_CONF_FUNCTION5);
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MMIO32(SCU_SSP0_COPI) = (SCU_SSP_IO | SCU_CONF_FUNCTION5);
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MMIO32(SCU_SSP0_SCK) = (SCU_SSP_IO | SCU_CONF_FUNCTION2);
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/* configure GPIO pins */
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MMIO32(SCU_FLASH_HOLD) = SCU_GPIO_FAST;
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MMIO32(SCU_FLASH_WP) = SCU_GPIO_FAST;
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MMIO32(SCU_SSP0_CS) = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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// remove hardware write protection
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/* drive CS, HOLD, and WP pins high */
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palSetPad(W25Q80BV_HOLD_PORT, W25Q80BV_HOLD_PAD);
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palSetPad(W25Q80BV_WP_PORT, W25Q80BV_WP_PAD);
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/* Set GPIO pins as outputs. */
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palOutputPad(W25Q80BV_HOLD_PORT, W25Q80BV_HOLD_PAD);
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palOutputPad(W25Q80BV_WP_PORT, W25Q80BV_WP_PAD);
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2023-03-28 12:39:00 +00:00
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}
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void wait_for_device() {
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2023-05-18 20:16:05 +00:00
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uint8_t device_id;
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do {
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device_id = get_device_id();
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} while (device_id != W25Q80BV_DEVICE_ID_RES &&
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device_id != W25Q16DV_DEVICE_ID_RES);
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2023-03-28 12:39:00 +00:00
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}
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void wait_not_busy() {
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2023-05-18 20:16:05 +00:00
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while (get_status() & W25Q80BV_STATUS_BUSY) {
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HALT_IF_DEBUGGING();
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}
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2023-03-28 12:39:00 +00:00
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}
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void remove_write_protection() {
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2023-05-18 20:16:05 +00:00
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uint8_t data[] = {W25Q80BV_WRITE_ENABLE};
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palClearPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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for (size_t j = 0; j < 1; j++) {
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data[j] = spi_ssp_transfer_word(data[j]);
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}
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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while (!(get_status() & W25Q80BV_STATUS_WEL)) {
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HALT_IF_DEBUGGING();
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}
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2023-03-28 12:39:00 +00:00
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}
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uint32_t spi_ssp_transfer_word(const uint32_t data) {
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2023-05-18 20:16:05 +00:00
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while ((SSP_SR(SSP0_BASE) & SSP_SR_TNF) == 0) {
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HALT_IF_DEBUGGING();
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}
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SSP_DR(SSP0_BASE) = data;
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while (SSP_SR(SSP0_BASE) & SSP_SR_BSY) {
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HALT_IF_DEBUGGING();
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}
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while ((SSP_SR(SSP0_BASE) & SSP_SR_RNE) == 0) {
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HALT_IF_DEBUGGING();
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}
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return SSP_DR(SSP0_BASE);
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2023-03-28 12:39:00 +00:00
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}
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uint8_t get_status() {
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2023-05-18 20:16:05 +00:00
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uint8_t data[] = {W25Q80BV_READ_STATUS1, 0xFF};
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palClearPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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for (size_t j = 0; j < 2; j++) {
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data[j] = spi_ssp_transfer_word(data[j]);
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}
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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return data[1];
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2023-03-28 12:39:00 +00:00
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}
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uint8_t get_device_id() {
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2023-05-18 20:16:05 +00:00
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uint8_t data[] = {W25Q80BV_DEVICE_ID, 0xFF, 0xFF, 0xFF, 0xFF};
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palClearPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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for (size_t j = 0; j < 5; j++) {
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data[j] = spi_ssp_transfer_word(data[j]);
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}
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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return data[4];
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2023-03-28 12:39:00 +00:00
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}
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void erase_chip() {
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2023-05-18 20:16:05 +00:00
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uint8_t data[] = {W25Q80BV_CHIP_ERASE};
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palClearPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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for (size_t j = 0; j < 1; j++) {
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data[j] = spi_ssp_transfer_word(data[j]);
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}
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2023-03-28 12:39:00 +00:00
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2023-05-18 20:16:05 +00:00
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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}
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2023-05-18 20:16:05 +00:00
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void write(size_t page_index, uint8_t* data_buffer, size_t length) {
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size_t page_len = 256U;
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size_t addr = page_index * page_len;
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uint8_t header[] = {
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W25Q80BV_PAGE_PROGRAM,
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(uint8_t)((addr & 0xFF0000) >> 16),
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(uint8_t)((addr & 0xFF00) >> 8),
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(uint8_t)(addr & 0xFF)};
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palClearPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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for (size_t j = 0; j < 4; j++) {
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header[j] = spi_ssp_transfer_word(header[j]);
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}
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for (size_t j = 0; j < length; j++) {
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data_buffer[j] = spi_ssp_transfer_word(data_buffer[j]);
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}
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palSetPad(W25Q80BV_SELECT_PORT, W25Q80BV_SELECT_PAD);
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2023-03-28 12:39:00 +00:00
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}
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2023-05-18 20:16:05 +00:00
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} // namespace w25q80bv
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