2015-07-08 08:39:24 -07:00
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/*
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* Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
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2023-03-21 19:18:38 +01:00
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* Copyright (C) 2023 Bernd Herzog
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2015-07-08 08:39:24 -07:00
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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2016-02-16 11:09:00 -08:00
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#include "core_control.hpp"
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2015-07-08 08:39:24 -07:00
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#include "hal.h"
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2016-02-16 11:04:35 -08:00
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#include "lpc43xx_cpp.hpp"
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using namespace lpc43xx;
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2015-08-20 18:03:49 -07:00
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#include "message.hpp"
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2016-02-10 20:11:19 -08:00
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#include "baseband_api.hpp"
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2023-03-21 19:18:38 +01:00
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#include "lz4.h"
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2015-08-20 18:03:49 -07:00
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2015-07-08 08:39:24 -07:00
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#include <cstring>
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2023-02-16 12:09:23 +00:00
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void m4_init(const portapack::spi_flash::image_tag_t image_tag, const portapack::memory::region_t to, const bool full_reset) {
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2023-05-19 08:16:05 +12:00
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const portapack::spi_flash::chunk_t* chunk = reinterpret_cast<const portapack::spi_flash::chunk_t*>(portapack::spi_flash::images.base());
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while (chunk->tag) {
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if (chunk->tag == image_tag) {
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const void* src = &chunk->data[0];
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void* dst = reinterpret_cast<void*>(to.base());
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2023-03-21 19:18:38 +01:00
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2023-05-19 08:16:05 +12:00
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/* extract and initialize M4 code RAM */
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unlz4_len(src, dst, chunk->compressed_data_size);
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2023-03-21 19:18:38 +01:00
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2023-05-19 08:16:05 +12:00
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/* M4 core is assumed to be sleeping with interrupts off, so we can mess
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* with its address space and RAM without concern.
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*/
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LPC_CREG->M4MEMMAP = to.base();
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2015-07-08 08:39:24 -07:00
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2023-05-19 08:16:05 +12:00
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/* Reset M4 core and optionally all peripherals */
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LPC_RGU->RESET_CTRL[0] = (full_reset) ? (1 << 1) // PERIPH_RST
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: (1 << 13) // M4_RST
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;
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2015-07-08 08:39:24 -07:00
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2023-05-19 08:16:05 +12:00
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return;
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}
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chunk = chunk->next();
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}
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2016-07-01 10:37:22 -07:00
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2023-05-19 08:16:05 +12:00
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chDbgPanic("NoImg");
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2015-07-08 08:39:24 -07:00
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}
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2015-08-20 18:03:49 -07:00
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void m4_request_shutdown() {
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2023-05-19 08:16:05 +12:00
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baseband::shutdown();
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2015-08-20 18:03:49 -07:00
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}
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2016-02-16 11:04:35 -08:00
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void m0_halt() {
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2023-05-19 08:16:05 +12:00
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rgu::reset(rgu::Reset::M0APP);
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while (true) {
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port_wait_for_interrupt();
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}
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2016-02-16 11:04:35 -08:00
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}
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