mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-25 04:37:38 +00:00
256 lines
8.4 KiB
C
256 lines
8.4 KiB
C
|
/*
|
||
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||
|
|
||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||
|
you may not use this file except in compliance with the License.
|
||
|
You may obtain a copy of the License at
|
||
|
|
||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||
|
|
||
|
Unless required by applicable law or agreed to in writing, software
|
||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
|
See the License for the specific language governing permissions and
|
||
|
limitations under the License.
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @file STM32F1xx/hal_lld.h
|
||
|
* @brief STM32F1xx HAL subsystem low level driver header.
|
||
|
* @pre This module requires the following macros to be defined in the
|
||
|
* @p board.h file:
|
||
|
* - STM32_LSECLK.
|
||
|
* - STM32_HSECLK.
|
||
|
* - STM32_HSE_BYPASS (optionally).
|
||
|
* .
|
||
|
* One of the following macros must also be defined:
|
||
|
* - STM32F10X_LD_VL for Value Line Low Density devices.
|
||
|
* - STM32F10X_MD_VL for Value Line Medium Density devices.
|
||
|
* - STM32F10X_LD for Performance Low Density devices.
|
||
|
* - STM32F10X_MD for Performance Medium Density devices.
|
||
|
* - STM32F10X_HD for Performance High Density devices.
|
||
|
* - STM32F10X_XL for Performance eXtra Density devices.
|
||
|
* - STM32F10X_CL for Connectivity Line devices.
|
||
|
* .
|
||
|
*
|
||
|
* @addtogroup HAL
|
||
|
* @{
|
||
|
*/
|
||
|
|
||
|
#ifndef _HAL_LLD_H_
|
||
|
#define _HAL_LLD_H_
|
||
|
|
||
|
#include "stm32.h"
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Driver constants. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/**
|
||
|
* @brief Defines the support for realtime counters in the HAL.
|
||
|
*/
|
||
|
#define HAL_IMPLEMENTS_COUNTERS TRUE
|
||
|
|
||
|
/**
|
||
|
* @name Internal clock sources
|
||
|
* @{
|
||
|
*/
|
||
|
#define STM32_HSICLK 8000000 /**< High speed internal clock. */
|
||
|
#define STM32_LSICLK 40000 /**< Low speed internal clock. */
|
||
|
/** @} */
|
||
|
|
||
|
/**
|
||
|
* @name PWR_CR register bits definitions
|
||
|
* @{
|
||
|
*/
|
||
|
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
|
||
|
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
|
||
|
#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
|
||
|
#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
|
||
|
#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
|
||
|
#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
|
||
|
#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
|
||
|
#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
|
||
|
#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
|
||
|
/** @} */
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Platform capabilities. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/**
|
||
|
* @name STM32F1xx capabilities
|
||
|
* @{
|
||
|
*/
|
||
|
/* RTC attributes.*/
|
||
|
#define STM32_HAS_RTC TRUE
|
||
|
#define STM32_RTC_HAS_SUBSECONDS TRUE
|
||
|
#define STM32_RTC_IS_CALENDAR FALSE
|
||
|
/** @} */
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Driver pre-compile time settings. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/**
|
||
|
* @name Configuration options
|
||
|
* @{
|
||
|
*/
|
||
|
/**
|
||
|
* @brief Disables the PWR/RCC initialization in the HAL.
|
||
|
*/
|
||
|
#if !defined(STM32_NO_INIT) || defined(__DOXYGEN__)
|
||
|
#define STM32_NO_INIT FALSE
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Enables or disables the programmable voltage detector.
|
||
|
*/
|
||
|
#if !defined(STM32_PVD_ENABLE) || defined(__DOXYGEN__)
|
||
|
#define STM32_PVD_ENABLE FALSE
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Sets voltage level for programmable voltage detector.
|
||
|
*/
|
||
|
#if !defined(STM32_PLS) || defined(__DOXYGEN__)
|
||
|
#define STM32_PLS STM32_PLS_LEV0
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Enables or disables the HSI clock source.
|
||
|
*/
|
||
|
#if !defined(STM32_HSI_ENABLED) || defined(__DOXYGEN__)
|
||
|
#define STM32_HSI_ENABLED TRUE
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Enables or disables the LSI clock source.
|
||
|
*/
|
||
|
#if !defined(STM32_LSI_ENABLED) || defined(__DOXYGEN__)
|
||
|
#define STM32_LSI_ENABLED FALSE
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Enables or disables the HSE clock source.
|
||
|
*/
|
||
|
#if !defined(STM32_HSE_ENABLED) || defined(__DOXYGEN__)
|
||
|
#define STM32_HSE_ENABLED TRUE
|
||
|
#endif
|
||
|
|
||
|
/**
|
||
|
* @brief Enables or disables the LSE clock source.
|
||
|
*/
|
||
|
#if !defined(STM32_LSE_ENABLED) || defined(__DOXYGEN__)
|
||
|
#define STM32_LSE_ENABLED FALSE
|
||
|
#endif
|
||
|
/** @} */
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Derived constants and error checks. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
#if defined(__DOXYGEN__)
|
||
|
/**
|
||
|
* @name Platform identification
|
||
|
* @{
|
||
|
*/
|
||
|
#define PLATFORM_NAME "STM32"
|
||
|
/** @} */
|
||
|
|
||
|
#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
|
||
|
defined(STM32F10X_HD_VL) || defined(__DOXYGEN__)
|
||
|
#include "hal_lld_f100.h"
|
||
|
|
||
|
#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) || \
|
||
|
defined(STM32F10X_HD) || defined(STM32F10X_XL) || \
|
||
|
defined(__DOXYGEN__)
|
||
|
#include "hal_lld_f103.h"
|
||
|
|
||
|
#elif defined(STM32F10X_CL) || defined(__DOXYGEN__)
|
||
|
#include "hal_lld_f105_f107.h"
|
||
|
|
||
|
#else
|
||
|
#error "unspecified, unsupported or invalid STM32 platform"
|
||
|
#endif
|
||
|
|
||
|
/* There are differences in vector names in the various sub-families,
|
||
|
normalizing.*/
|
||
|
#if defined(STM32F10X_XL)
|
||
|
#define TIM1_BRK_IRQn TIM1_BRK_TIM9_IRQn
|
||
|
#define TIM1_UP_IRQn TIM1_UP_TIM10_IRQn
|
||
|
#define TIM1_TRG_COM_IRQn TIM1_TRG_COM_TIM11_IRQn
|
||
|
#define TIM8_BRK_IRQn TIM8_BRK_TIM12_IRQn
|
||
|
#define TIM8_UP_IRQn TIM8_UP_TIM13_IRQn
|
||
|
#define TIM8_TRG_COM_IRQn TIM8_TRG_COM_TIM14_IRQn
|
||
|
|
||
|
#elif defined(STM32F10X_LD_VL)|| defined(STM32F10X_MD_VL) || \
|
||
|
defined(STM32F10X_HD_VL)
|
||
|
#define TIM1_BRK_IRQn TIM1_BRK_TIM15_IRQn
|
||
|
#define TIM1_UP_IRQn TIM1_UP_TIM16_IRQn
|
||
|
#define TIM1_TRG_COM_IRQn TIM1_TRG_COM_TIM17_IRQn
|
||
|
#endif
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Driver data structures and types. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/**
|
||
|
* @brief Type representing a system clock frequency.
|
||
|
*/
|
||
|
typedef uint32_t halclock_t;
|
||
|
|
||
|
/**
|
||
|
* @brief Type of the realtime free counter value.
|
||
|
*/
|
||
|
typedef uint32_t halrtcnt_t;
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* Driver macros. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/**
|
||
|
* @brief Returns the current value of the system free running counter.
|
||
|
* @note This service is implemented by returning the content of the
|
||
|
* DWT_CYCCNT register.
|
||
|
*
|
||
|
* @return The value of the system free running counter of
|
||
|
* type halrtcnt_t.
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
#define hal_lld_get_counter_value() DWT_CYCCNT
|
||
|
|
||
|
/**
|
||
|
* @brief Realtime counter frequency.
|
||
|
* @note The DWT_CYCCNT register is incremented directly by the system
|
||
|
* clock so this function returns STM32_HCLK.
|
||
|
*
|
||
|
* @return The realtime counter frequency of type halclock_t.
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
#define hal_lld_get_counter_frequency() STM32_HCLK
|
||
|
|
||
|
/*===========================================================================*/
|
||
|
/* External declarations. */
|
||
|
/*===========================================================================*/
|
||
|
|
||
|
/* STM32 ISR, DMA and RCC helpers.*/
|
||
|
#include "stm32_isr.h"
|
||
|
#include "stm32_dma.h"
|
||
|
#include "stm32_rcc.h"
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
extern "C" {
|
||
|
#endif
|
||
|
void hal_lld_init(void);
|
||
|
void stm32_clock_init(void);
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#endif /* _HAL_LLD_H_ */
|
||
|
|
||
|
/** @} */
|