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https://github.com/portapack-mayhem/mayhem-firmware.git
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96 lines
3.8 KiB
C
96 lines
3.8 KiB
C
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/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC560BCxx/spc560bc_registry.h
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* @brief SPC560B/Cxx capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef _SPC560BC_REGISTRY_H_
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#define _SPC560BC_REGISTRY_H_
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name SPC560B/Cxx capabilities
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* @{
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*/
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/* eDMA attributes.*/
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#define SPC5_HAS_EDMA FALSE
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/* LINFlex attributes.*/
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#define SPC5_HAS_LINFLEX0 TRUE
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#define SPC5_LINFLEX0_PCTL 48
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#define SPC5_LINFLEX0_RXI_HANDLER vector79
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#define SPC5_LINFLEX0_TXI_HANDLER vector80
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#define SPC5_LINFLEX0_ERR_HANDLER vector81
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#define SPC5_LINFLEX0_RXI_NUMBER 79
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#define SPC5_LINFLEX0_TXI_NUMBER 80
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#define SPC5_LINFLEX0_ERR_NUMBER 81
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#define SPC5_LINFLEX0_CLK (halSPCGetSystemClock() / \
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SPC5_PERIPHERAL1_CLK_DIV_VALUE)
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#define SPC5_HAS_LINFLEX1 TRUE
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#define SPC5_LINFLEX1_PCTL 49
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#define SPC5_LINFLEX1_RXI_HANDLER vector99
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#define SPC5_LINFLEX1_TXI_HANDLER vector100
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#define SPC5_LINFLEX1_ERR_HANDLER vector101
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#define SPC5_LINFLEX1_RXI_NUMBER 99
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#define SPC5_LINFLEX1_TXI_NUMBER 100
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#define SPC5_LINFLEX1_ERR_NUMBER 101
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#define SPC5_LINFLEX1_CLK (halSPCGetSystemClock() / \
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SPC5_PERIPHERAL1_CLK_DIV_VALUE)
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#define SPC5_HAS_LINFLEX2 TRUE
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#define SPC5_LINFLEX2_PCTL 50
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#define SPC5_LINFLEX2_RXI_HANDLER vector119
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#define SPC5_LINFLEX2_TXI_HANDLER vector120
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#define SPC5_LINFLEX2_ERR_HANDLER vector121
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#define SPC5_LINFLEX2_RXI_NUMBER 119
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#define SPC5_LINFLEX2_TXI_NUMBER 120
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#define SPC5_LINFLEX2_ERR_NUMBER 121
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#define SPC5_LINFLEX2_CLK (halSPCGetSystemClock() / \
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SPC5_PERIPHERAL1_CLK_DIV_VALUE)
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#define SPC5_HAS_LINFLEX3 TRUE
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#define SPC5_LINFLEX3_PCTL 51
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#define SPC5_LINFLEX3_RXI_HANDLER vector122
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#define SPC5_LINFLEX3_TXI_HANDLER vector123
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#define SPC5_LINFLEX3_ERR_HANDLER vector124
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#define SPC5_LINFLEX3_RXI_NUMBER 122
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#define SPC5_LINFLEX3_TXI_NUMBER 123
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#define SPC5_LINFLEX3_ERR_NUMBER 124
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#define SPC5_LINFLEX3_CLK (halSPCGetSystemClock() / \
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SPC5_PERIPHERAL1_CLK_DIV_VALUE)
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/* SIUL attributes.*/
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#define SPC5_HAS_SIUL TRUE
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#define SPC5_SIUL_PCTL 68
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#define SPC5_SIUL_NUM_PORTS 8
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#define SPC5_SIUL_NUM_PCRS 123
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#define SPC5_SIUL_NUM_PADSELS 32
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#define SPC5_SIUL_SYSTEM_PINS 32,33,121,122
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/** @} */
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#endif /* _SPC560BC_REGISTRY_H_ */
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/** @} */
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