mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-22 07:57:43 +00:00
798 lines
49 KiB
C
798 lines
49 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for STMicroelectronics STM32F401-Discovery board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_STM32F4_DISCOVERY
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#define BOARD_NAME "STMicroelectronics STM32F401-Discovery"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F401xx
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/*
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* IO pins assignments.
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*/
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#define GPIOA_BUTTON 0
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#define GPIOA_PIN1 1
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#define GPIOA_PIN2 2
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#define GPIOA_PIN3 3
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#define GPIOA_LRCK 4
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#define GPIOA_SPC 5
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#define GPIOA_SDO 6
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#define GPIOA_SDI 7
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#define GPIOA_PIN8 8
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#define GPIOA_VBUS_FS 9
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#define GPIOA_OTG_FS_ID 10
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#define GPIOA_OTG_FS_DM 11
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#define GPIOA_OTG_FS_DP 12
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#define GPIOA_SWDIO 13
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#define GPIOA_SWCLK 14
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#define GPIOA_PIN15 15
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#define GPIOB_PIN0 0
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#define GPIOB_PIN1 1
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#define GPIOB_PIN2 2
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#define GPIOB_SWO 3
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#define GPIOB_PIN4 4
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#define GPIOB_PIN5 5
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#define GPIOB_SCL 6
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#define GPIOB_PIN7 7
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#define GPIOB_PIN8 8
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#define GPIOB_SDA 9
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#define GPIOB_CLK_IN 10
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#define GPIOB_NOT_AVAILABLE 11 //This is now VCAP1, not usable as a pin
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#define GPIOB_PIN12 12
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#define GPIOB_PIN13 13
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#define GPIOB_PIN14 14
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#define GPIOB_PIN15 15
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#define GPIOC_OTG_FS_POWER_ON 0
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#define GPIOC_PIN1 1
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#define GPIOC_PIN2 2
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#define GPIOC_PDM_OUT 3
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#define GPIOC_PIN4 4
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#define GPIOC_PIN5 5
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#define GPIOC_PIN6 6
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#define GPIOC_MCLK 7
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#define GPIOC_PIN8 8
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#define GPIOC_PIN9 9
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#define GPIOC_SCLK 10
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#define GPIOC_PIN11 11
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#define GPIOC_SDIN 12
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#define GPIOC_PIN13 13
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#define GPIOC_PIN14 14 //If crystal fitted and SB18 removed, OSC32_IN
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#define GPIOC_PIN15 15 //If crystal fitted and SB17 removed, OSC32_OUT
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#define GPIOD_PIN0 0
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#define GPIOD_PIN1 1
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#define GPIOD_PIN2 2
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#define GPIOD_PIN3 3
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#define GPIOD_RESET 4
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#define GPIOD_OVER_CURRENT 5
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#define GPIOD_PIN6 6
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#define GPIOD_PIN7 7
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#define GPIOD_PIN8 8
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#define GPIOD_PIN9 9
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#define GPIOD_PIN10 10
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#define GPIOD_PIN11 11
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#define GPIOD_LED4 12
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#define GPIOD_LED3 13
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#define GPIOD_LED5 14
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#define GPIOD_LED6 15
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#define GPIOE_INT1 0
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#define GPIOE_INT2 1
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#define GPIOE_LSM_DRDY 2 //LSM303DLHC DRDY
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#define GPIOE_CS_SPI 3
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#define GPIOE_LSM_INT1 4 //LSM303DLHC INT1
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#define GPIOE_LSM_INT2 5 //LSM303DLHC INT2
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#define GPIOE_PIN6 6
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#define GPIOE_PIN7 7
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#define GPIOE_PIN8 8
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#define GPIOE_PIN9 9
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#define GPIOE_PIN10 10
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#define GPIOE_PIN11 11
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#define GPIOE_PIN12 12
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#define GPIOE_PIN13 13
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#define GPIOE_PIN14 14
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#define GPIOE_PIN15 15
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#define GPIOH_OSC_IN 0
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#define GPIOH_OSC_OUT 1
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
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#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
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#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
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#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
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#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
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/*
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* GPIOA setup:
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*
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* PA0 - BUTTON (input floating).
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* PA1 - PIN1 (input pullup).
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* PA2 - PIN2 (input pullup).
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* PA3 - PIN3 (input pullup).
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* PA4 - LRCK (alternate 6).
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* PA5 - SPC (alternate 5).
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* PA6 - SDO (alternate 5).
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* PA7 - SDI (alternate 5).
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* PA8 - PIN8 (input pullup).
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* PA9 - VBUS_FS (input floating).
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* PA10 - OTG_FS_ID (alternate 10).
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* PA11 - OTG_FS_DM (alternate 10).
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* PA12 - OTG_FS_DP (alternate 10).
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* PA13 - SWDIO (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
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PIN_MODE_INPUT(GPIOA_PIN1) | \
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PIN_MODE_INPUT(GPIOA_PIN2) | \
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PIN_MODE_INPUT(GPIOA_PIN3) | \
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PIN_MODE_ALTERNATE(GPIOA_LRCK) | \
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PIN_MODE_ALTERNATE(GPIOA_SPC) | \
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PIN_MODE_ALTERNATE(GPIOA_SDO) | \
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PIN_MODE_ALTERNATE(GPIOA_SDI) | \
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PIN_MODE_INPUT(GPIOA_PIN8) | \
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PIN_MODE_INPUT(GPIOA_VBUS_FS) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
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PIN_MODE_INPUT(GPIOA_PIN15))
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
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PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SPC) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SDO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SDI) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
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PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_BUTTON) | \
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PIN_OSPEED_100M(GPIOA_PIN1) | \
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PIN_OSPEED_100M(GPIOA_PIN2) | \
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PIN_OSPEED_100M(GPIOA_PIN3) | \
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PIN_OSPEED_100M(GPIOA_LRCK) | \
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PIN_OSPEED_50M(GPIOA_SPC) | \
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PIN_OSPEED_50M(GPIOA_SDO) | \
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PIN_OSPEED_50M(GPIOA_SDI) | \
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PIN_OSPEED_100M(GPIOA_PIN8) | \
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PIN_OSPEED_100M(GPIOA_VBUS_FS) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
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PIN_OSPEED_100M(GPIOA_SWDIO) | \
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PIN_OSPEED_100M(GPIOA_SWCLK) | \
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PIN_OSPEED_100M(GPIOA_PIN15))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
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PIN_PUPDR_FLOATING(GPIOA_LRCK) | \
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PIN_PUPDR_FLOATING(GPIOA_SPC) | \
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PIN_PUPDR_FLOATING(GPIOA_SDO) | \
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PIN_PUPDR_FLOATING(GPIOA_SDI) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
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PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
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PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
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PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN15))
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
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PIN_ODR_HIGH(GPIOA_PIN1) | \
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PIN_ODR_HIGH(GPIOA_PIN2) | \
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PIN_ODR_HIGH(GPIOA_PIN3) | \
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PIN_ODR_HIGH(GPIOA_LRCK) | \
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PIN_ODR_HIGH(GPIOA_SPC) | \
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PIN_ODR_HIGH(GPIOA_SDO) | \
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PIN_ODR_HIGH(GPIOA_SDI) | \
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PIN_ODR_HIGH(GPIOA_PIN8) | \
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PIN_ODR_HIGH(GPIOA_VBUS_FS) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
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PIN_ODR_HIGH(GPIOA_SWDIO) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \
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PIN_AFIO_AF(GPIOA_PIN1, 0) | \
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PIN_AFIO_AF(GPIOA_PIN2, 0) | \
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PIN_AFIO_AF(GPIOA_PIN3, 0) | \
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PIN_AFIO_AF(GPIOA_LRCK, 6) | \
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PIN_AFIO_AF(GPIOA_SPC, 5) | \
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PIN_AFIO_AF(GPIOA_SDO, 5) | \
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PIN_AFIO_AF(GPIOA_SDI, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
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PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
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PIN_AFIO_AF(GPIOA_PIN15, 0))
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/*
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* GPIOB setup:
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*
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* PB0 - PIN0 (input pullup).
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* PB1 - PIN1 (input pullup).
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* PB2 - PIN2 (input pullup).
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* PB3 - SWO (alternate 0).
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* PB4 - PIN4 (input pullup).
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* PB5 - PIN5 (input pullup).
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* PB6 - SCL (alternate 4).
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* PB7 - PIN7 (input pullup).
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* PB8 - PIN8 (input pullup).
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* PB9 - SDA (alternate 4).
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* PB10 - CLK_IN (input pullup).
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* PB11 - NOT_AVAILABLE (input floating).
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* PB12 - PIN12 (input pullup).
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* PB13 - PIN13 (input pullup).
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* PB14 - PIN14 (input pullup).
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* PB15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
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PIN_MODE_INPUT(GPIOB_PIN1) | \
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PIN_MODE_INPUT(GPIOB_PIN2) | \
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PIN_MODE_ALTERNATE(GPIOB_SWO) | \
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PIN_MODE_INPUT(GPIOB_PIN4) | \
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PIN_MODE_INPUT(GPIOB_PIN5) | \
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PIN_MODE_ALTERNATE(GPIOB_SCL) | \
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PIN_MODE_INPUT(GPIOB_PIN7) | \
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PIN_MODE_INPUT(GPIOB_PIN8) | \
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PIN_MODE_ALTERNATE(GPIOB_SDA) | \
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PIN_MODE_INPUT(GPIOB_CLK_IN) | \
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PIN_MODE_INPUT(GPIOB_NOT_AVAILABLE) | \
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PIN_MODE_INPUT(GPIOB_PIN12) | \
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PIN_MODE_INPUT(GPIOB_PIN13) | \
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PIN_MODE_INPUT(GPIOB_PIN14) | \
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PIN_MODE_INPUT(GPIOB_PIN15))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
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PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
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PIN_OTYPE_OPENDRAIN(GPIOB_SDA) | \
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PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) | \
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PIN_OTYPE_PUSHPULL(GPIOB_NOT_AVAILABLE) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
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#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \
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PIN_OSPEED_100M(GPIOB_PIN1) | \
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PIN_OSPEED_100M(GPIOB_PIN2) | \
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PIN_OSPEED_100M(GPIOB_SWO) | \
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PIN_OSPEED_100M(GPIOB_PIN4) | \
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PIN_OSPEED_100M(GPIOB_PIN5) | \
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PIN_OSPEED_100M(GPIOB_SCL) | \
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PIN_OSPEED_100M(GPIOB_PIN7) | \
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PIN_OSPEED_100M(GPIOB_PIN8) | \
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PIN_OSPEED_100M(GPIOB_SDA) | \
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|
PIN_OSPEED_100M(GPIOB_CLK_IN) | \
|
||
|
PIN_OSPEED_100M(GPIOB_NOT_AVAILABLE) | \
|
||
|
PIN_OSPEED_100M(GPIOB_PIN12) | \
|
||
|
PIN_OSPEED_100M(GPIOB_PIN13) | \
|
||
|
PIN_OSPEED_100M(GPIOB_PIN14) | \
|
||
|
PIN_OSPEED_100M(GPIOB_PIN15))
|
||
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOB_SWO) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOB_SCL) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOB_SDA) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOB_NOT_AVAILABLE) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
||
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN1) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
||
|
PIN_ODR_HIGH(GPIOB_SWO) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN4) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN5) | \
|
||
|
PIN_ODR_HIGH(GPIOB_SCL) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN7) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
||
|
PIN_ODR_HIGH(GPIOB_SDA) | \
|
||
|
PIN_ODR_HIGH(GPIOB_CLK_IN) | \
|
||
|
PIN_ODR_HIGH(GPIOB_NOT_AVAILABLE) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN15))
|
||
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_SWO, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_SCL, 4) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
||
|
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_SDA, 4) | \
|
||
|
PIN_AFIO_AF(GPIOB_CLK_IN, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_NOT_AVAILABLE, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOC setup:
|
||
|
*
|
||
|
* PC0 - OTG_FS_POWER_ON (output pushpull maximum).
|
||
|
* PC1 - PIN1 (input pullup).
|
||
|
* PC2 - PIN2 (input pullup).
|
||
|
* PC3 - PDM_OUT (input pullup).
|
||
|
* PC4 - PIN4 (input pullup).
|
||
|
* PC5 - PIN5 (input pullup).
|
||
|
* PC6 - PIN6 (input pullup).
|
||
|
* PC7 - MCLK (alternate 6).
|
||
|
* PC8 - PIN8 (input pullup).
|
||
|
* PC9 - PIN9 (input pullup).
|
||
|
* PC10 - SCLK (alternate 6).
|
||
|
* PC11 - PIN11 (input pullup).
|
||
|
* PC12 - SDIN (alternate 6).
|
||
|
* PC13 - PIN13 (input pullup).
|
||
|
* PC14 - PIN14 (input pullup).
|
||
|
* PC15 - PIN15 (input pullup).
|
||
|
*/
|
||
|
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\
|
||
|
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PDM_OUT) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
||
|
PIN_MODE_ALTERNATE(GPIOC_MCLK) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
||
|
PIN_MODE_ALTERNATE(GPIOC_SCLK) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
||
|
PIN_MODE_ALTERNATE(GPIOC_SDIN) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
||
|
PIN_MODE_INPUT(GPIOC_PIN15))
|
||
|
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_SCLK) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_SDIN) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
||
|
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\
|
||
|
PIN_OSPEED_100M(GPIOC_PIN1) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN2) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PDM_OUT) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN4) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN5) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN6) | \
|
||
|
PIN_OSPEED_100M(GPIOC_MCLK) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN8) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN9) | \
|
||
|
PIN_OSPEED_100M(GPIOC_SCLK) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN11) | \
|
||
|
PIN_OSPEED_100M(GPIOC_SDIN) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN13) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN14) | \
|
||
|
PIN_OSPEED_100M(GPIOC_PIN15))
|
||
|
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOC_MCLK) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOC_SCLK) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOC_SDIN) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
||
|
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PDM_OUT) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
||
|
PIN_ODR_HIGH(GPIOC_MCLK) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
||
|
PIN_ODR_HIGH(GPIOC_SCLK) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
||
|
PIN_ODR_HIGH(GPIOC_SDIN) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
||
|
PIN_ODR_HIGH(GPIOC_PIN15))
|
||
|
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\
|
||
|
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_MCLK, 6))
|
||
|
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_SCLK, 6) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_SDIN, 6) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
||
|
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOD setup:
|
||
|
*
|
||
|
* PD0 - PIN0 (input pullup).
|
||
|
* PD1 - PIN1 (input pullup).
|
||
|
* PD2 - PIN2 (input pullup).
|
||
|
* PD3 - PIN3 (input pullup).
|
||
|
* PD4 - RESET (output pushpull maximum).
|
||
|
* PD5 - OVER_CURRENT (input floating).
|
||
|
* PD6 - PIN6 (input pullup).
|
||
|
* PD7 - PIN7 (input pullup).
|
||
|
* PD8 - PIN8 (input pullup).
|
||
|
* PD9 - PIN9 (input pullup).
|
||
|
* PD10 - PIN10 (input pullup).
|
||
|
* PD11 - PIN11 (input pullup).
|
||
|
* PD12 - LED4 (output pushpull maximum).
|
||
|
* PD13 - LED3 (output pushpull maximum).
|
||
|
* PD14 - LED5 (output pushpull maximum).
|
||
|
* PD15 - LED6 (output pushpull maximum).
|
||
|
*/
|
||
|
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
||
|
PIN_MODE_OUTPUT(GPIOD_RESET) | \
|
||
|
PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
||
|
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
||
|
PIN_MODE_OUTPUT(GPIOD_LED4) | \
|
||
|
PIN_MODE_OUTPUT(GPIOD_LED3) | \
|
||
|
PIN_MODE_OUTPUT(GPIOD_LED5) | \
|
||
|
PIN_MODE_OUTPUT(GPIOD_LED6))
|
||
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_LED4) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOD_LED6))
|
||
|
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN1) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN2) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN3) | \
|
||
|
PIN_OSPEED_100M(GPIOD_RESET) | \
|
||
|
PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN6) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN7) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN8) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN9) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN10) | \
|
||
|
PIN_OSPEED_100M(GPIOD_PIN11) | \
|
||
|
PIN_OSPEED_100M(GPIOD_LED4) | \
|
||
|
PIN_OSPEED_100M(GPIOD_LED3) | \
|
||
|
PIN_OSPEED_100M(GPIOD_LED5) | \
|
||
|
PIN_OSPEED_100M(GPIOD_LED6))
|
||
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_RESET) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_LED4) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_LED3) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_LED5) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOD_LED6))
|
||
|
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
||
|
PIN_ODR_HIGH(GPIOD_RESET) | \
|
||
|
PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
||
|
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
||
|
PIN_ODR_LOW(GPIOD_LED4) | \
|
||
|
PIN_ODR_LOW(GPIOD_LED3) | \
|
||
|
PIN_ODR_LOW(GPIOD_LED5) | \
|
||
|
PIN_ODR_LOW(GPIOD_LED6))
|
||
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_RESET, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
||
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_LED4, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_LED3, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_LED5, 0) | \
|
||
|
PIN_AFIO_AF(GPIOD_LED6, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOE setup:
|
||
|
*
|
||
|
* PE0 - INT1 (input floating).
|
||
|
* PE1 - INT2 (input floating).
|
||
|
* PE2 - LSM_DRDY (input floating).
|
||
|
* PE3 - CS_SPI (output pushpull maximum).
|
||
|
* PE4 - LSM_INT1 (input floating).
|
||
|
* PE5 - LSM_INT2 (input floating).
|
||
|
* PE6 - PIN6 (input floating).
|
||
|
* PE7 - PIN7 (input floating).
|
||
|
* PE8 - PIN8 (input floating).
|
||
|
* PE9 - PIN9 (input floating).
|
||
|
* PE10 - PIN10 (input floating).
|
||
|
* PE11 - PIN11 (input floating).
|
||
|
* PE12 - PIN12 (input floating).
|
||
|
* PE13 - PIN13 (input floating).
|
||
|
* PE14 - PIN14 (input floating).
|
||
|
* PE15 - PIN15 (input floating).
|
||
|
*/
|
||
|
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \
|
||
|
PIN_MODE_INPUT(GPIOE_INT2) | \
|
||
|
PIN_MODE_INPUT(GPIOE_LSM_DRDY) | \
|
||
|
PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \
|
||
|
PIN_MODE_INPUT(GPIOE_LSM_INT1) | \
|
||
|
PIN_MODE_INPUT(GPIOE_LSM_INT2) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN6) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN7) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN8) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN9) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN10) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN11) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN12) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN13) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN14) | \
|
||
|
PIN_MODE_INPUT(GPIOE_PIN15))
|
||
|
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_LSM_DRDY) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT2) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
||
|
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \
|
||
|
PIN_OSPEED_100M(GPIOE_INT2) | \
|
||
|
PIN_OSPEED_100M(GPIOE_LSM_DRDY) | \
|
||
|
PIN_OSPEED_100M(GPIOE_CS_SPI) | \
|
||
|
PIN_OSPEED_100M(GPIOE_LSM_INT1) | \
|
||
|
PIN_OSPEED_100M(GPIOE_LSM_INT2) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN6) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN7) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN8) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN9) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN10) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN11) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN12) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN13) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN14) | \
|
||
|
PIN_OSPEED_100M(GPIOE_PIN15))
|
||
|
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_INT2) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_LSM_DRDY) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_CS_SPI) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_LSM_INT1) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_LSM_INT2) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOE_PIN15))
|
||
|
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \
|
||
|
PIN_ODR_HIGH(GPIOE_INT2) | \
|
||
|
PIN_ODR_HIGH(GPIOE_LSM_DRDY) | \
|
||
|
PIN_ODR_HIGH(GPIOE_CS_SPI) | \
|
||
|
PIN_ODR_HIGH(GPIOE_LSM_INT1) | \
|
||
|
PIN_ODR_HIGH(GPIOE_LSM_INT2) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN6) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN7) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN8) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN9) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN10) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN11) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN12) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN13) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN14) | \
|
||
|
PIN_ODR_HIGH(GPIOE_PIN15))
|
||
|
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_INT2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_LSM_DRDY, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_CS_SPI, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_LSM_INT1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_LSM_INT2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
||
|
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
||
|
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOH setup:
|
||
|
*
|
||
|
* PH0 - OSC_IN (input floating).
|
||
|
* PH1 - OSC_OUT (input floating).
|
||
|
* PH2 - PIN2 (input floating).
|
||
|
* PH3 - PIN3 (input floating).
|
||
|
* PH4 - PIN4 (input floating).
|
||
|
* PH5 - PIN5 (input floating).
|
||
|
* PH6 - PIN6 (input floating).
|
||
|
* PH7 - PIN7 (input floating).
|
||
|
* PH8 - PIN8 (input floating).
|
||
|
* PH9 - PIN9 (input floating).
|
||
|
* PH10 - PIN10 (input floating).
|
||
|
* PH11 - PIN11 (input floating).
|
||
|
* PH12 - PIN12 (input floating).
|
||
|
* PH13 - PIN13 (input floating).
|
||
|
* PH14 - PIN14 (input floating).
|
||
|
* PH15 - PIN15 (input floating).
|
||
|
*/
|
||
|
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
||
|
PIN_MODE_INPUT(GPIOH_OSC_OUT))
|
||
|
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT))
|
||
|
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \
|
||
|
PIN_OSPEED_100M(GPIOH_OSC_OUT))
|
||
|
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT))
|
||
|
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
||
|
PIN_ODR_HIGH(GPIOH_OSC_OUT))
|
||
|
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \
|
||
|
PIN_AFIO_AF(GPIOH_OSC_OUT, 0))
|
||
|
#define VAL_GPIOH_AFRH (0)
|
||
|
|
||
|
|
||
|
#if !defined(_FROM_ASM_)
|
||
|
#ifdef __cplusplus
|
||
|
extern "C" {
|
||
|
#endif
|
||
|
void boardInit(void);
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
#endif /* _FROM_ASM_ */
|
||
|
|
||
|
#endif /* _BOARD_H_ */
|