From 00c7cdf027a0ec034a989bfe566102826f6bd428 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 30 Aug 2016 21:30:03 -0700 Subject: [PATCH] CPLD: Always clock SGPIO data on external clock rising edge. --- firmware/common/baseband_sgpio.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/common/baseband_sgpio.cpp b/firmware/common/baseband_sgpio.cpp index 1cc0d143..8e9e972d 100644 --- a/firmware/common/baseband_sgpio.cpp +++ b/firmware/common/baseband_sgpio.cpp @@ -282,7 +282,7 @@ constexpr CLK_CAPTURE_MODE data_clk_capture_mode( ) { return (direction == Direction::Transmit) ? CLK_CAPTURE_MODE::RISING_CLOCK_EDGE - : CLK_CAPTURE_MODE::FALLING_CLOCK_EDGE + : CLK_CAPTURE_MODE::RISING_CLOCK_EDGE ; }