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https://github.com/portapack-mayhem/mayhem-firmware.git
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Formatted code (#1007)
* Updated style * Updated files * fixed new line * Updated spacing * File fix WIP * Updated to clang 13 * updated comment style * Removed old comment code
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jLynx
@@ -46,45 +46,45 @@ constexpr uint32_t gpdma_src_peripheral = 0x0;
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constexpr uint32_t gpdma_dest_peripheral = 0x0;
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constexpr gpdma::channel::LLIPointer lli_pointer(const void* lli) {
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return {
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.lm = gpdma_ahb_master_lli_fetch,
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.r = 0,
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.lli = reinterpret_cast<uint32_t>(lli),
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};
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return {
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.lm = gpdma_ahb_master_lli_fetch,
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.r = 0,
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.lli = reinterpret_cast<uint32_t>(lli),
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};
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}
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constexpr gpdma::channel::Control control(const baseband::Direction direction, const size_t buffer_words) {
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return {
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.transfersize = buffer_words,
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.sbsize = 0, /* Burst size: 1 */
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.dbsize = 0, /* Burst size: 1 */
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.swidth = 2, /* Source transfer width: word (32 bits) */
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.dwidth = 2, /* Destination transfer width: word (32 bits) */
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.s = (direction == baseband::Direction::Transmit) ? gpdma_ahb_master_memory : gpdma_ahb_master_sgpio,
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.d = (direction == baseband::Direction::Transmit) ? gpdma_ahb_master_sgpio : gpdma_ahb_master_memory,
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.si = (direction == baseband::Direction::Transmit) ? 1U : 0U,
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.di = (direction == baseband::Direction::Transmit) ? 0U : 1U,
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.prot1 = 0,
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.prot2 = 0,
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.prot3 = 0,
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.i = 1,
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};
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return {
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.transfersize = buffer_words,
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.sbsize = 0, /* Burst size: 1 */
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.dbsize = 0, /* Burst size: 1 */
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.swidth = 2, /* Source transfer width: word (32 bits) */
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.dwidth = 2, /* Destination transfer width: word (32 bits) */
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.s = (direction == baseband::Direction::Transmit) ? gpdma_ahb_master_memory : gpdma_ahb_master_sgpio,
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.d = (direction == baseband::Direction::Transmit) ? gpdma_ahb_master_sgpio : gpdma_ahb_master_memory,
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.si = (direction == baseband::Direction::Transmit) ? 1U : 0U,
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.di = (direction == baseband::Direction::Transmit) ? 0U : 1U,
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.prot1 = 0,
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.prot2 = 0,
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.prot3 = 0,
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.i = 1,
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};
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}
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constexpr gpdma::channel::Config config(const baseband::Direction direction) {
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return {
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.e = 0,
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.srcperipheral = gpdma_src_peripheral,
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.destperipheral = gpdma_dest_peripheral,
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.flowcntrl = (direction == baseband::Direction::Transmit)
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? gpdma::FlowControl::MemoryToPeripheral_DMAControl
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: gpdma::FlowControl::PeripheralToMemory_DMAControl,
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.ie = 1,
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.itc = 1,
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.l = 0,
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.a = 0,
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.h = 0,
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};
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return {
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.e = 0,
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.srcperipheral = gpdma_src_peripheral,
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.destperipheral = gpdma_dest_peripheral,
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.flowcntrl = (direction == baseband::Direction::Transmit)
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? gpdma::FlowControl::MemoryToPeripheral_DMAControl
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: gpdma::FlowControl::PeripheralToMemory_DMAControl,
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.ie = 1,
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.itc = 1,
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.l = 0,
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.a = 0,
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.h = 0,
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};
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}
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constexpr size_t buffer_samples_log2n = 13;
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@@ -108,75 +108,74 @@ volatile uint32_t buffer_transfered = 0;
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volatile uint32_t buffer_handled = 0;
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static void transfer_complete() {
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const auto next_lli_index = gpdma_channel_sgpio.next_lli() - &lli_loop[0];
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buffer_transfered++;
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thread_wait.wake_from_interrupt(next_lli_index);
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const auto next_lli_index = gpdma_channel_sgpio.next_lli() - &lli_loop[0];
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buffer_transfered++;
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thread_wait.wake_from_interrupt(next_lli_index);
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}
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static void dma_error() {
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thread_wait.wake_from_interrupt(-1);
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disable();
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thread_wait.wake_from_interrupt(-1);
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disable();
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}
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void init() {
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gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
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gpdma_channel_sgpio.set_handlers(transfer_complete, dma_error);
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#if defined(PORTAPACK_BASEBAND_DMA_NO_SYNC)
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/* Disable synchronization logic to improve(?) DMA response time.
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* SGPIO (peripheral) must be on same clock as GPDMA peripheral.
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* SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal
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* operation, same as the M4 and M0 cores. Memory, of course, is
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* running from the same clock as the cores.
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*/
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LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
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LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
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/* Disable synchronization logic to improve(?) DMA response time.
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* SGPIO (peripheral) must be on same clock as GPDMA peripheral.
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* SGPIO runs from BASE_PERIPH_CLK, which is set to PLL1 in normal
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* operation, same as the M4 and M0 cores. Memory, of course, is
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* running from the same clock as the cores.
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*/
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LPC_GPDMA->SYNC |= (1 << gpdma_src_peripheral);
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LPC_GPDMA->SYNC |= (1 << gpdma_dest_peripheral);
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#endif
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}
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void configure(
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baseband::sample_t* const buffer_base,
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const baseband::Direction direction
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) {
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const auto peripheral = reinterpret_cast<uint32_t>(&LPC_SGPIO->REG_SS[0]);
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const auto control_value = control(direction, gpdma::buffer_words(transfer_bytes, 4));
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for(size_t i=0; i<lli_loop.size(); i++) {
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const auto memory = reinterpret_cast<uint32_t>(&buffer_base[i * transfer_samples]);
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lli_loop[i].srcaddr = (direction == Direction::Transmit) ? memory : peripheral;
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lli_loop[i].destaddr = (direction == Direction::Transmit) ? peripheral : memory;
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lli_loop[i].lli = lli_pointer(&lli_loop[(i + 1) % lli_loop.size()]);
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lli_loop[i].control = control_value;
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}
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baseband::sample_t* const buffer_base,
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const baseband::Direction direction) {
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const auto peripheral = reinterpret_cast<uint32_t>(&LPC_SGPIO->REG_SS[0]);
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const auto control_value = control(direction, gpdma::buffer_words(transfer_bytes, 4));
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for (size_t i = 0; i < lli_loop.size(); i++) {
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const auto memory = reinterpret_cast<uint32_t>(&buffer_base[i * transfer_samples]);
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lli_loop[i].srcaddr = (direction == Direction::Transmit) ? memory : peripheral;
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lli_loop[i].destaddr = (direction == Direction::Transmit) ? peripheral : memory;
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lli_loop[i].lli = lli_pointer(&lli_loop[(i + 1) % lli_loop.size()]);
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lli_loop[i].control = control_value;
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}
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}
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void enable(const baseband::Direction direction) {
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const auto gpdma_config = config(direction);
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gpdma_channel_sgpio.configure(lli_loop[0], gpdma_config);
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gpdma_channel_sgpio.enable();
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const auto gpdma_config = config(direction);
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gpdma_channel_sgpio.configure(lli_loop[0], gpdma_config);
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gpdma_channel_sgpio.enable();
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}
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bool is_enabled() {
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return gpdma_channel_sgpio.is_enabled();
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return gpdma_channel_sgpio.is_enabled();
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}
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void disable() {
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gpdma_channel_sgpio.disable();
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gpdma_channel_sgpio.disable();
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}
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baseband::buffer_t wait_for_buffer() {
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const auto next_index = thread_wait.sleep();
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buffer_handled++;
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const auto next_index = thread_wait.sleep();
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buffer_handled++;
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auto buffer_missed = buffer_transfered - buffer_handled;
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shared_memory.m4_buffer_missed = buffer_missed;
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if( next_index >= 0 ) {
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const size_t free_index = (next_index + transfers_per_buffer - 2) & transfers_mask;
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const auto src = lli_loop[free_index].srcaddr;
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const auto dst = lli_loop[free_index].destaddr;
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const auto p = (src == reinterpret_cast<uint32_t>(&LPC_SGPIO->REG_SS[0])) ? dst : src;
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return { reinterpret_cast<sample_t*>(p), transfer_samples };
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} else {
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return { };
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}
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auto buffer_missed = buffer_transfered - buffer_handled;
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shared_memory.m4_buffer_missed = buffer_missed;
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if (next_index >= 0) {
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const size_t free_index = (next_index + transfers_per_buffer - 2) & transfers_mask;
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const auto src = lli_loop[free_index].srcaddr;
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const auto dst = lli_loop[free_index].destaddr;
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const auto p = (src == reinterpret_cast<uint32_t>(&LPC_SGPIO->REG_SS[0])) ? dst : src;
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return {reinterpret_cast<sample_t*>(p), transfer_samples};
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} else {
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return {};
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}
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}
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} /* namespace dma */
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