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This commit is contained in:
jLynx
2023-05-19 08:16:05 +12:00
committed by GitHub
parent 7aca7ce74d
commit 033c4e9a5b
599 changed files with 70746 additions and 66896 deletions
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75
firmware/baseband/w25q80bv.hpp
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@@ -32,13 +32,13 @@
#define RESET_CTRL1_SPIFI_RST (1 << RESET_CTRL1_SPIFI_RST_SHIFT)
#define W25Q80BV_WRITE_ENABLE 0x06
#define W25Q80BV_CHIP_ERASE 0xC7
#define W25Q80BV_DEVICE_ID 0xAB
#define W25Q80BV_CHIP_ERASE 0xC7
#define W25Q80BV_DEVICE_ID 0xAB
#define W25Q80BV_PAGE_PROGRAM 0x02
#define PERIPH_BASE_APB0 0x40080000
#define SCU_BASE (PERIPH_BASE_APB0 + 0x06000)
#define MMIO32(addr) (*(volatile uint32_t *)(addr))
#define MMIO32(addr) (*(volatile uint32_t*)(addr))
#define PIN_GROUP3 (SCU_BASE + 0x180)
#define PIN3 0x00C
@@ -48,25 +48,25 @@
#define PIN7 0x01C
#define PIN8 0x020
#define BIT0 (1<<0)
#define BIT1 (1<<1)
#define BIT2 (1<<2)
#define BIT3 (1<<3)
#define BIT4 (1<<4)
#define BIT5 (1<<5)
#define BIT6 (1<<6)
#define BIT7 (1<<7)
#define BIT8 (1<<8)
#define BIT0 (1 << 0)
#define BIT1 (1 << 1)
#define BIT2 (1 << 2)
#define BIT3 (1 << 3)
#define BIT4 (1 << 4)
#define BIT5 (1 << 5)
#define BIT6 (1 << 6)
#define BIT7 (1 << 7)
#define BIT8 (1 << 8)
#define SCU_CONF_EPUN_DIS_PULLUP (BIT4)
#define SCU_CONF_EHS_FAST (BIT5)
#define SCU_CONF_EZI_EN_IN_BUFFER (BIT6)
#define SCU_CONF_ZIF_DIS_IN_GLITCH_FILT (BIT7)
#define SCU_GPIO_FAST (SCU_CONF_EPUN_DIS_PULLUP | \
SCU_CONF_EHS_FAST | \
SCU_CONF_EZI_EN_IN_BUFFER | \
SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)
#define SCU_GPIO_FAST (SCU_CONF_EPUN_DIS_PULLUP | \
SCU_CONF_EHS_FAST | \
SCU_CONF_EZI_EN_IN_BUFFER | \
SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)
#define SCU_SSP_IO SCU_GPIO_FAST
#define SCU_CONF_FUNCTION0 (0x0)
@@ -89,8 +89,8 @@
#define SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)
#define SSP_CPSR(port) MMIO32(port + 0x010)
#define SSP_CR0(port) MMIO32(port + 0x000)
#define SSP_ENABLE BIT1
#define SSP_DATA_8BITS 0x7
#define SSP_ENABLE BIT1
#define SSP_DATA_8BITS 0x7
#define palSetPad(port, pad) (LPC_GPIO->SET[(port)] = 1 << (pad))
#define palClearPad(port, pad) (LPC_GPIO->CLR[(port)] = 1 << (pad))
@@ -108,33 +108,32 @@
#define LEDRX_PAD 2
#define LEDTX_PAD 8
#define W25Q80BV_STATUS_BUSY 0x01
#define W25Q80BV_STATUS_WEL 0x02
#define W25Q80BV_STATUS_WEL 0x02
#define W25Q80BV_READ_STATUS1 0x05
#define W25Q80BV_READ_STATUS2 0x35
#define PERIPH_BASE_APB0 0x40080000
#define SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)
#define PERIPH_BASE_APB0 0x40080000
#define SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)
#define SSP_DR(port) MMIO32(port + 0x008)
#define SSP_SR(port) MMIO32(port + 0x00C)
#define SSP_SR_TNF BIT1
#define SSP_SR_RNE BIT2
#define SSP_SR_BSY BIT4
#define SSP_SR_TNF BIT1
#define SSP_SR_RNE BIT2
#define SSP_SR_BSY BIT4
namespace w25q80bv {
void disable_spifi();
uint8_t get_status();
void wait_for_device();
void wait_not_busy();
uint32_t spi_ssp_transfer_word(const uint32_t data);
void initialite_spi();
void setup();
void remove_write_protection();
uint8_t get_device_id();
void erase_chip();
void write(size_t page_index, uint8_t *data_buffer, size_t length);
}
void disable_spifi();
uint8_t get_status();
void wait_for_device();
void wait_not_busy();
uint32_t spi_ssp_transfer_word(const uint32_t data);
void initialite_spi();
void setup();
void remove_write_protection();
uint8_t get_device_id();
void erase_chip();
void write(size_t page_index, uint8_t* data_buffer, size_t length);
} // namespace w25q80bv
#endif/*__W25Q80BV_H__*/
#endif /*__W25Q80BV_H__*/