Hardware: Schematic for PP H1 revision 20170522.

This commit is contained in:
Jared Boone
2017-06-19 15:57:56 -07:00
parent 1668d4ff7a
commit 259348259b
10 changed files with 4112 additions and 2974 deletions

View File

@@ -1,4 +1,4 @@
update=Wednesday, July 15, 2015 'PMt' 10:20:27 PM
update=Mon 19 Jun 2017 03:56:47 PM PDT
version=1
last_client=kicad
[cvpcb]
@@ -6,65 +6,58 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[pcbnew/libraries]
LibDir=../../../library-kicad
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=smd_capacitors
LibName7=smd_resistors
LibName8=smd_crystal&oscillator
LibName9=smd_dil
LibName10=smd_transistors
LibName11=libcms
LibName12=display
LibName13=led
LibName14=dip_sockets
LibName15=pga_sockets
LibName16=valves
[general]
version=1
[eeschema]
version=1
LibDir=../../../library-kicad
[eeschema/libraries]
LibName1=hackrf_expansion
LibName2=wolfson
LibName1=portapack_h1-rescue
LibName2=hackrf_expansion
LibName3=passive
LibName4=lcd_kingtech
LibName5=supply
LibName6=io_expander
LibName7=trs_jack
LibName8=battery
LibName9=mosfet
LibName10=microphone
LibName11=sd
LibName12=ck
LibName13=altera
LibName14=regulator
LibName15=tp
LibName16=header
LibName17=hole
LibName18=sharebrained
LibName19=fiducial
LibName4=supply
LibName5=trs_jack
LibName6=battery
LibName7=sd
LibName8=ck
LibName9=altera
LibName10=regulator
LibName11=tp
LibName12=header
LibName13=hole
LibName14=sharebrained
LibName15=fiducial
LibName16=eastrising
LibName17=on_semi
LibName18=asahi_kasei
LibName19=ti
LibName20=diode
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=portapack_h1.net
PadDrill=0
PadDrillOvalY=0
PadSizeH=2.25
PadSizeV=2.25
PcbTextSizeV=1.5
PcbTextSizeH=1.5
PcbTextThickness=0.3
ModuleTextSizeV=0.6095999999999999
ModuleTextSizeH=0.6095999999999999
ModuleTextSizeThickness=0.12
SolderMaskClearance=0.07619999999999999
SolderMaskMinWidth=0.1016
DrawSegmentWidth=0.1524
BoardOutlineThickness=0.09999999999999999
ModuleOutlineThickness=0.1524
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60