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CPLD: Switch sense of LCD_RD/WR pins.
Should keep CPLD settled when in HackRF mode.
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@@ -49,8 +49,8 @@ namespace portapack {
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portapack::IO io {
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portapack::gpio_dir,
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portapack::gpio_lcd_rd,
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portapack::gpio_lcd_wr,
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portapack::gpio_lcd_rdx,
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portapack::gpio_lcd_wrx,
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portapack::gpio_io_stbx,
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portapack::gpio_addr,
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portapack::gpio_lcd_te,
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