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found missing revert (#1743)

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Bernd Herzog 2024-01-08 20:13:51 +01:00 committed by GitHub
parent 77640c5cc0
commit 89dc8c0463
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1 changed files with 0 additions and 10 deletions
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10
firmware/common/portapack_io.hpp
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@ -191,7 +191,6 @@ class IO {
} }
uint32_t io_read() { uint32_t io_read() {
chSysLock(); // Dont interrupt time critical tasks
io_stb_assert(); io_stb_assert();
dir_read(); dir_read();
addr_0(); addr_0();
@ -200,7 +199,6 @@ class IO {
__asm__("nop"); __asm__("nop");
const auto switches_raw = data_read(); const auto switches_raw = data_read();
io_stb_deassert(); io_stb_deassert();
chSysUnlock();
return switches_raw; return switches_raw;
} }
@ -299,7 +297,6 @@ class IO {
} }
void lcd_command(const uint32_t value) { void lcd_command(const uint32_t value) {
chSysLock(); // Dont interrupt time critical tasks
data_write_high(0); /* Drive high byte (with zero -- don't care) */ data_write_high(0); /* Drive high byte (with zero -- don't care) */
dir_write(); /* Turn around data bus, MCU->CPLD */ dir_write(); /* Turn around data bus, MCU->CPLD */
addr(0); /* Indicate command */ addr(0); /* Indicate command */
@ -315,11 +312,9 @@ class IO {
lcd_wr_deassert(); /* Complete write operation */ lcd_wr_deassert(); /* Complete write operation */
addr(1); /* Set up for data phase (most likely after a command) */ addr(1); /* Set up for data phase (most likely after a command) */
chSysUnlock();
} }
void lcd_write_data(const uint32_t value) __attribute__((always_inline)) { void lcd_write_data(const uint32_t value) __attribute__((always_inline)) {
chSysLock(); // Dont interrupt time critical tasks
// NOTE: Assumes and DIR=0 and ADDR=1 from command phase. // NOTE: Assumes and DIR=0 and ADDR=1 from command phase.
data_write_high(value); /* Drive high byte */ data_write_high(value); /* Drive high byte */
__asm__("nop"); __asm__("nop");
@ -330,11 +325,9 @@ class IO {
__asm__("nop"); __asm__("nop");
__asm__("nop"); __asm__("nop");
lcd_wr_deassert(); /* Complete write operation */ lcd_wr_deassert(); /* Complete write operation */
chSysUnlock();
} }
uint32_t lcd_read_data() { uint32_t lcd_read_data() {
chSysLock(); // Dont interrupt time critical tasks
// NOTE: Assumes ADDR=1 from command phase. // NOTE: Assumes ADDR=1 from command phase.
dir_read(); dir_read();
@ -352,12 +345,10 @@ class IO {
halPolledDelay(18); // 90ns halPolledDelay(18); // 90ns
const auto value_low = data_read(); const auto value_low = data_read();
chSysUnlock();
return (value_high << 8) | value_low; return (value_high << 8) | value_low;
} }
void io_write(const bool address, const uint_fast16_t value) { void io_write(const bool address, const uint_fast16_t value) {
chSysLock(); // Dont interrupt time critical tasks
data_write_low(value); data_write_low(value);
dir_write(); dir_write();
addr(address); addr(address);
@ -369,7 +360,6 @@ class IO {
__asm__("nop"); __asm__("nop");
__asm__("nop"); __asm__("nop");
io_stb_deassert(); io_stb_deassert();
chSysUnlock();
} }
/* /*
void lcd_data_write_command_and_data( void lcd_data_write_command_and_data(