From a22dc150bc4326295f27c5fa854cb81e56179e95 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Thu, 5 Jan 2017 17:10:00 -0800 Subject: [PATCH] C++14: make some wrapper classes static. Also address GCC 6.2 not allowing constexpr from reinterpret_cast<> values. --- firmware/application/touch_adc.cpp | 10 ++--- firmware/baseband/rssi.cpp | 12 +++--- firmware/common/adc.hpp | 65 ++++++++++++++---------------- firmware/common/hackrf_hal.hpp | 4 +- firmware/common/i2s.hpp | 46 +++++++++++---------- 5 files changed, 68 insertions(+), 69 deletions(-) diff --git a/firmware/application/touch_adc.cpp b/firmware/application/touch_adc.cpp index be731282..91748ff2 100644 --- a/firmware/application/touch_adc.cpp +++ b/firmware/application/touch_adc.cpp @@ -57,14 +57,14 @@ constexpr lpc43xx::adc::Config adc0_config { }; void init() { - adc0.clock_enable(); - adc0.interrupts_disable(); - adc0.power_up(adc0_config); - adc0.interrupts_enable(adc0_interrupt_mask); + adc0::clock_enable(); + adc0::interrupts_disable(); + adc0::power_up(adc0_config); + adc0::interrupts_enable(adc0_interrupt_mask); } void start() { - adc0.start_burst(); + adc0::start_burst(); } // static constexpr bool monitor_overruns_and_not_dones = false; diff --git a/firmware/baseband/rssi.cpp b/firmware/baseband/rssi.cpp index 2e9cfa32..1abf10a1 100644 --- a/firmware/baseband/rssi.cpp +++ b/firmware/baseband/rssi.cpp @@ -52,22 +52,22 @@ constexpr adc::Config adc1_config { }; void init() { - adc1.clock_enable(); - adc1.interrupts_disable(); - adc1.power_up(adc1_config); - adc1.interrupts_enable(adc1_interrupt_mask); + adc1::clock_enable(); + adc1::interrupts_disable(); + adc1::power_up(adc1_config); + adc1::interrupts_enable(adc1_interrupt_mask); dma::init(); } void start() { dma::enable(); - adc1.start_burst(); + adc1::start_burst(); } void stop() { dma::disable(); - adc1.stop_burst(); + adc1::stop_burst(); } } /* namespace rssi */ diff --git a/firmware/common/adc.hpp b/firmware/common/adc.hpp index e419ee22..71414666 100644 --- a/firmware/common/adc.hpp +++ b/firmware/common/adc.hpp @@ -52,84 +52,81 @@ struct Config { uint32_t cr; }; +template class ADC { public: - constexpr ADC( - LPC_ADCx_Type* adcp - ) : adcp(adcp) - { + static void power_up(const Config config) { + adcp().CR = config.cr; } - void power_up(const Config config) const { - adcp->CR = config.cr; - } - - void clock_enable() const { - if( adcp == LPC_ADC0 ) { + static void clock_enable() { + if( &adcp() == LPC_ADC0 ) { LPC_CCU1->CLK_APB3_ADC0_CFG.AUTO = 1; LPC_CCU1->CLK_APB3_ADC0_CFG.RUN = 1; } - if( adcp == LPC_ADC1 ) { + if( &adcp() == LPC_ADC1 ) { LPC_CCU1->CLK_APB3_ADC1_CFG.AUTO = 1; LPC_CCU1->CLK_APB3_ADC1_CFG.RUN = 1; } } - void clock_disable() const { - if( adcp == LPC_ADC0 ) { + static void clock_disable() { + if( &adcp() == LPC_ADC0 ) { LPC_CCU1->CLK_APB3_ADC0_CFG.RUN = 0; } - if( adcp == LPC_ADC1 ) { + if( &adcp() == LPC_ADC1 ) { LPC_CCU1->CLK_APB3_ADC1_CFG.RUN = 0; } } - void disable() const { - adcp->INTEN = 0; - adcp->CR = 0; + static void disable() { + adcp().INTEN = 0; + adcp().CR = 0; clock_disable(); } - void interrupts_disable() const { - adcp->INTEN = 0; + static void interrupts_disable() { + adcp().INTEN = 0; } - void interrupts_enable(const uint32_t mask) const { - adcp->INTEN = mask; + static void interrupts_enable(const uint32_t mask) { + adcp().INTEN = mask; } - void start_burst() const { - adcp->CR |= (1U << 16); + static void start_burst() { + adcp().CR |= (1U << 16); } - void start_once() const { - adcp->CR |= (1U << 24); + static void start_once() { + adcp().CR |= (1U << 24); } - void start_once(size_t n) const { - uint32_t cr = adcp->CR; + static void start_once(size_t n) { + uint32_t cr = adcp().CR; cr &= ~(0xffU); cr |= (1 << 24) | (1 << n); - adcp->CR = cr; + adcp().CR = cr; } - void stop_burst() const { - adcp->CR &= ~(1U << 16); + static void stop_burst() { + adcp().CR &= ~(1U << 16); } - uint32_t convert(size_t n) const { + static uint32_t convert(size_t n) { start_once(n); while(true) { - const uint32_t data = adcp->DR[n]; + const uint32_t data = adcp().DR[n]; if( (data >> 31) & 1 ) { return (data >> 6) & 0x3ff; } } } - + private: - LPC_ADCx_Type* const adcp; + static LPC_ADCx_Type& adcp() { + return *reinterpret_cast(BaseAddress); + } }; } /* namespace adc */ diff --git a/firmware/common/hackrf_hal.hpp b/firmware/common/hackrf_hal.hpp index 8b41f0a3..b7d5e1c0 100644 --- a/firmware/common/hackrf_hal.hpp +++ b/firmware/common/hackrf_hal.hpp @@ -67,11 +67,11 @@ constexpr size_t clock_generator_output_mcu_clkin = 7; /* ADC0 */ -constexpr adc::ADC adc0 { LPC_ADC0 }; +using adc0 = adc::ADC; /* ADC1 */ -constexpr adc::ADC adc1 { LPC_ADC1 }; +using adc1 = adc::ADC; void reset(); diff --git a/firmware/common/i2s.hpp b/firmware/common/i2s.hpp index b7d4d46a..0ddaa966 100644 --- a/firmware/common/i2s.hpp +++ b/firmware/common/i2s.hpp @@ -155,8 +155,6 @@ struct ConfigDMA { template class I2S { public: - static constexpr LPC_I2S_Type* Peripheral = reinterpret_cast(BaseAddress); - static void configure( const ConfigTX& config_tx, const ConfigRX& config_rx @@ -167,28 +165,28 @@ public: /* NOTE: Documentation of CREG6 is quite confusing. Refer to "I2S clocking and * pin connections" and other I2S diagrams for more clarity. */ - if( Peripheral == LPC_I2S0 ) { + if( &p() == LPC_I2S0 ) { LPC_CREG->CREG6 |= (1U << 12) | (1U << 13) ; } - if( Peripheral == LPC_I2S1 ) { + if( &p() == LPC_I2S1 ) { LPC_CREG->CREG6 |= (1U << 14) | (1U << 15) ; } - Peripheral->DAO = config_tx.dao; - Peripheral->TXRATE = config_tx.txrate; - Peripheral->TXBITRATE = config_tx.txbitrate; - Peripheral->TXMODE = config_tx.txmode; + p().DAO = config_tx.dao; + p().TXRATE = config_tx.txrate; + p().TXBITRATE = config_tx.txbitrate; + p().TXMODE = config_tx.txmode; - Peripheral->DAI = config_rx.dai; - Peripheral->RXRATE = config_rx.rxrate; - Peripheral->RXBITRATE = config_rx.rxbitrate; - Peripheral->RXMODE = config_rx.rxmode; + p().DAI = config_rx.dai; + p().RXRATE = config_rx.rxrate; + p().RXBITRATE = config_rx.rxbitrate; + p().RXMODE = config_rx.rxmode; } static void configure( @@ -198,38 +196,42 @@ public: ) { configure(config_tx, config_rx); - Peripheral->DMA1 = config_dma.dma1; - Peripheral->DMA2 = config_dma.dma2; + p().DMA1 = config_dma.dma1; + p().DMA2 = config_dma.dma2; } static void rx_start() { - Peripheral->DAI &= ~(1U << 3); + p().DAI &= ~(1U << 3); } static void rx_stop() { - Peripheral->DAI |= (1U << 3); + p().DAI |= (1U << 3); } static void tx_start() { - Peripheral->DAO &= ~(1U << 3); + p().DAO &= ~(1U << 3); } static void tx_stop() { - Peripheral->DAO |= (1U << 3); + p().DAO |= (1U << 3); } static void tx_mute() { - Peripheral->DAO |= (1U << 15); + p().DAO |= (1U << 15); } static void tx_unmute() { - Peripheral->DAO &= ~(1U << 15); + p().DAO &= ~(1U << 15); } private: static void reset() { - Peripheral->DAO |= (1U << 4); - Peripheral->DAI |= (1U << 4); + p().DAO |= (1U << 4); + p().DAI |= (1U << 4); + } + + static LPC_I2S_Type& p() { + return *reinterpret_cast(BaseAddress); } };