ChibiOS 2.6.8, until I can figure out where to get it from git.

2025-08-15 05:57:40 +00:00 · 2015-07-08 08:40:23 -07:00
parent dc6fee8370
commit e1eea8e08a
1929 changed files with 575326 additions and 0 deletions
--- a/firmware/chibios/boards/ARDUINO_MEGA/board.c
+++ b/firmware/chibios/boards/ARDUINO_MEGA/board.c
@@ -0,0 +1,102 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+#if defined(PORTA)
+  {VAL_PORTA, VAL_DDRA},
+#endif
+#if defined(PORTB)
+  {VAL_PORTB, VAL_DDRB},
+#endif
+#if defined(PORTC)
+  {VAL_PORTC, VAL_DDRC},
+#endif
+#if defined(PORTD)
+  {VAL_PORTD, VAL_DDRD},
+#endif
+#if defined(PORTE)
+  {VAL_PORTE, VAL_DDRE},
+#endif
+#if defined(PORTF)
+  {VAL_PORTF, VAL_DDRF},
+#endif
+#if defined(PORTG)
+  {VAL_PORTG, VAL_DDRG},
+#endif
+#if defined(PORTH)
+  {VAL_PORTH, VAL_DDRH},
+#endif
+#if defined(PORTJ)
+  {VAL_PORTJ, VAL_DDRJ},
+#endif
+#if defined(PORTK)
+  {VAL_PORTK, VAL_DDRK},
+#endif
+#if defined(PORTL)
+  {VAL_PORTL, VAL_DDRL},
+#endif
+};
+#endif /* HAL_USE_PAL */
+
+/**
+ * @brief   Timer0 interrupt handler.
+ */
+CH_IRQ_HANDLER(TIMER0_COMPA_vect) {
+
+  CH_IRQ_PROLOGUE();
+
+  chSysLockFromIsr();
+  chSysTimerHandlerI();
+  chSysUnlockFromIsr();
+
+  CH_IRQ_EPILOGUE();
+}
+
+/**
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+  /*
+   * External interrupts setup, all disabled initially.
+   */
+  EICRA  = 0x00;
+  EICRB  = 0x00;
+  EIMSK  = 0x00;
+
+  /*
+   * Timer 0 setup.
+   */
+  TCCR0A  = (1 << WGM01) | (0 << WGM00) |                /* CTC mode.        */
+            (0 << COM0A1) | (0 << COM0A0) |              /* OC0A disabled.   */
+            (0 << COM0B1) | (0 << COM0B0);               /* OC0B disabled.   */
+  TCCR0B  = (0 << WGM02) |                               /* CTC mode.        */
+            (0 << CS02)  | (1 << CS01)  | (1 << CS00);   /* CLK/64 clock.    */
+  OCR0A   = F_CPU / 64 / CH_FREQUENCY - 1;
+  TCNT0   = 0;                                           /* Reset counter.   */
+  TIFR0   = (1 << OCF0A);                                /* Reset pending.   */
+  TIMSK0  = (1 << OCIE0A);                               /* IRQ on compare.  */
+}