mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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ChibiOS 2.6.8, until I can figure out where to get it from git.
This commit is contained in:
Jared Boone
93
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.c
Executable file
93
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.c
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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#if defined(PORTA)
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{VAL_PORTA, VAL_DDRA},
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#endif
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#if defined(PORTB)
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{VAL_PORTB, VAL_DDRB},
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#endif
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#if defined(PORTC)
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{VAL_PORTC, VAL_DDRC},
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#endif
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#if defined(PORTD)
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{VAL_PORTD, VAL_DDRD},
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#endif
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#if defined(PORTE)
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{VAL_PORTE, VAL_DDRE},
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#endif
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#if defined(PORTF)
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{VAL_PORTF, VAL_DDRF},
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#endif
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#if defined(PORTG)
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{VAL_PORTG, VAL_DDRG},
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#endif
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};
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#endif /* HAL_USE_PAL */
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/**
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* @brief Timer0 interrupt handler.
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*/
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CH_IRQ_HANDLER(TIMER0_COMP_vect) {
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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/**
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* External interrupts setup, all disabled initially.
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*/
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EICRA = 0x00;
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EICRB = 0x00;
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EIMSK = 0x00;
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/*
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* Enables Idle mode for SLEEP instruction.
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*/
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MCUCR = (1 << SE);
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/*
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* Timer 0 setup.
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*/
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TCCR0 = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
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(0 << COM01) | (0 << COM00) | /* OC0A disabled. */
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(1 << CS02) | (0 << CS01) | (0 << CS00); /* CLK/64 clock. */
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OCR0 = F_CPU / 64 / CH_FREQUENCY - 1;
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TCNT0 = 0; /* Reset counter. */
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TIFR = (1 << OCF0); /* Reset pending. */
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TIMSK = (1 << OCIE0); /* IRQ on compare. */
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}
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124
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.h
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124
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.h
Executable file
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for the Olimex AVR-MT-128 proto board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_OLIMEX_AVR_MT_128
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#define BOARD_NAME "Olimex AVR-MT-128"
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/* PA7 RLY DS B5 B4 B3 B2 B1
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* IN OUT IN IN IN IN IN IN
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* DDRA 0 1 0 0 0 0 0 0
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* PU VAL HiZ HiZ HiZ HiZ HiZ HiZ
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* PORTA 1 0 0 0 0 0 0 0
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*/
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#define VAL_DDRA 0x40
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#define VAL_PORTA 0x80
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/*
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* All inputs with pullups.
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*/
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#define VAL_DDRB 0x00
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#define VAL_PORTB 0xFF
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/* D7 D6 D5 D4 PC3 E R/W RS
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* OUT OUT OUT OUT IN OUT OUT OUT
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* DDRC 1 1 1 1 0 1 1 1
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* PU PU PU PU PU VAL VAL VAL
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* PORTC 0 0 0 0 1 0 0 0
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*/
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#define VAL_DDRC 0xF7
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#define VAL_PORTC 0x08
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/* PD7 PD6 PD5 PD4 TXD RXD PD1 PD0
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* IN IN IN IN OUT IN IN IN
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* DDRD 0 0 0 0 1 0 0 0
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* PU PU PU PU VAL HiZ PU PU
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* PORTD 1 1 1 1 1 0 1 1
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*/
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#define VAL_DDRD 0x08
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#define VAL_PORTD 0xFB
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/* PE7 PE6 BZ2 BZ2 PE3 PE2 PE1 PE0
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* IN IN OUT OUT IN IN OUT IN
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* DDRE 0 0 1 1 0 0 1 0
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* PU PU VAL VAL PU PU VAL PU
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* PORTE 1 1 1 1 1 1 1 1
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*/
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#define VAL_DDRE 0x32
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#define VAL_PORTE 0xFF
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/* TDI TDO TMS TCK PF3 PF2 PF1 PF0
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* x x x x IN IN IN IN
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* DDRF 0 0 0 0 0 0 0 0
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* x x x x PU PU PU PU
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* PORTF 0 0 0 0 1 1 1 1
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*
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*/
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#define VAL_DDRF 0x00
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#define VAL_PORTF 0x0F
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/* x x x x x PG2 PG1 PG0
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* x x x x x IN IN IN
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* DDRG 0 0 0 0 0 0 0 0
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* x x x x x PU PU PU
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* PORTG 0 0 0 0 0 1 1 1
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*
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*/
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#define VAL_DDRG 0x00
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#define VAL_PORTG 0x07
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#define PORTA_BUTTON1 0
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#define PORTA_BUTTON2 1
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#define PORTA_BUTTON3 2
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#define PORTA_BUTTON4 3
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#define PORTA_BUTTON5 4
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#define PORTA_DALLAS 5
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#define PORTA_RELAY 6
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#define PORTC_44780_RS_MASK (1 << 0)
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#define PORTC_44780_RW_MASK (1 << 1)
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#define PORTC_44780_E_MASK (1 << 2)
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#define PORTC_44780_D4_MASK (1 << 4)
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#define PORTC_44780_D5_MASK (1 << 5)
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#define PORTC_44780_D6_MASK (1 << 6)
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#define PORTC_44780_D7_MASK (1 << 7)
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#define PORTC_44780_DATA_MASK (PORTC_44780_D4_MASK | PORTC_44780_D5_MASK | \
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PORTC_44780_D6_MASK | PORTC_44780_D7_MASK)
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#define PORTE_BUZZ1 (1 << 4)
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#define PORTE_BUZZ2 (1 << 5)
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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5
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.mk
Executable file
5
firmware/chibios/boards/OLIMEX_AVR_MT_128/board.mk
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# List of all the board related files.
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BOARDSRC = ${CHIBIOS}/boards/OLIMEX_AVR_MT_128/board.c
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# Required include directories
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BOARDINC = ${CHIBIOS}/boards/OLIMEX_AVR_MT_128
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