mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2025-08-24 16:17:50 +00:00
ChibiOS 2.6.8, until I can figure out where to get it from git.
This commit is contained in:
Jared Boone
467
firmware/chibios/os/hal/platforms/AT91SAM7/pwm_lld.c
Executable file
467
firmware/chibios/os/hal/platforms/AT91SAM7/pwm_lld.c
Executable file
@@ -0,0 +1,467 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
|
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distributed under the License is distributed on an "AS IS" BASIS,
|
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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||||
See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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This file has been contributed by:
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Andrew Hannam aka inmarket.
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*/
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/**
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* @file AT91SAM7/pwm_lld.c
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* @brief AT91SAM7 PWM Driver subsystem low level driver source.
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*
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* @addtogroup PWM
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#ifdef UNUSED
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#elif defined(__GNUC__)
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# define UNUSED(x) UNUSED_ ## x __attribute__((unused))
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#elif defined(__LCLINT__)
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# define UNUSED(x) /*@unused@*/ x
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#else
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# define UNUSED(x) x
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#endif
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#define PWMC_M ((AT91S_PWMC *)AT91C_PWMC_MR)
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#define PWM_MCK_MASK 0x0F00
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#define PWM_MCK_SHIFT 8
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typedef struct pindef {
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uint32_t portpin; /* Set to 0 if this pin combination is invalid */
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AT91S_PIO *pio;
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AT91_REG *perab;
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} pindef_t;
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typedef struct pwmpindefs {
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pindef_t pin[3];
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} pwmpindefs_t;
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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#if PWM_USE_PWM1 && !defined(__DOXYGEN__)
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PWMDriver PWMD1;
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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PWMDriver PWMD2;
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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PWMDriver PWMD3;
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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PWMDriver PWMD4;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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#if (SAM7_PLATFORM == SAM7S64) || (SAM7_PLATFORM == SAM7S128) || \
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(SAM7_PLATFORM == SAM7S256) || (SAM7_PLATFORM == SAM7S512)
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#if PWM_USE_PWM1 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP1 = {{
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{ AT91C_PA0_PWM0 , AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_ASR },
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{ AT91C_PA11_PWM0, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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{ AT91C_PA23_PWM0, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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}};
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP2 = {{
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{ AT91C_PA1_PWM1 , AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_ASR },
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{ AT91C_PA12_PWM1, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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{ AT91C_PA24_PWM1, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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}};
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP3 = {{
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{ AT91C_PA2_PWM2 , AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_ASR },
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{ AT91C_PA13_PWM2, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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{ AT91C_PA25_PWM2, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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}};
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP4 = {{
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{ AT91C_PA7_PWM3 , AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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{ AT91C_PA14_PWM3, AT91C_BASE_PIOA, &AT91C_BASE_PIOA->PIO_BSR },
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{ 0, 0, 0 },
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}};
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#endif
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#elif (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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#if PWM_USE_PWM1 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP1 = {{
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{ AT91C_PB19_PWM0, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_ASR },
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{ AT91C_PB27_PWM0, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_BSR },
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{ 0, 0, 0 },
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}};
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP2 = {{
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{ AT91C_PB20_PWM1, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_ASR },
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{ AT91C_PB28_PWM1, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_BSR },
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{ 0, 0, 0 },
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}};
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP3 = {{
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{ AT91C_PB21_PWM2, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_ASR },
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{ AT91C_PB29_PWM2, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_BSR },
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{ 0, 0, 0 },
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}};
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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static const pwmpindefs_t PWMP4 = {{
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{ AT91C_PB22_PWM3, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_ASR },
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{ AT91C_PB30_PWM3, AT91C_BASE_PIOB, &AT91C_BASE_PIOB->PIO_BSR },
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{ 0, 0, 0 },
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}};
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#endif
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#else
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#error "PWM pins not defined for this SAM7 version"
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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PWMDriver PWMD2;
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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PWMDriver PWMD3;
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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PWMDriver PWMD4;
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#endif
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if defined(__GNUC__)
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__attribute__((noinline))
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#endif
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/**
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* @brief Common IRQ handler.
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*/
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static void pwm_lld_serve_interrupt(void) {
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uint32_t isr;
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isr = PWMC_M->PWMC_ISR;
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#if PWM_USE_PWM1
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if ((isr & 1) && PWMD1.config->channels[0].callback)
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PWMD1.config->channels[0].callback(&PWMD1);
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#endif
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#if PWM_USE_PWM2
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if ((isr & 2) && PWMD2.config->channels[0].callback)
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PWMD2.config->channels[0].callback(&PWMD2);
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#endif
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#if PWM_USE_PWM3
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if ((isr & 4) && PWMD3.config->channels[0].callback)
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PWMD3.config->channels[0].callback(&PWMD3);
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#endif
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#if PWM_USE_PWM4
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if ((isr & 8) && PWMD4.config->channels[0].callback)
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PWMD4.config->channels[0].callback(&PWMD4);
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#endif
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}
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CH_IRQ_HANDLER(PWMIrqHandler) {
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CH_IRQ_PROLOGUE();
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pwm_lld_serve_interrupt();
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level PWM driver initialization.
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*
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* @notapi
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*/
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void pwm_lld_init(void) {
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/* Driver initialization.*/
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#if PWM_USE_PWM1 && !defined(__DOXYGEN__)
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pwmObjectInit(&PWMD1);
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PWMD1.chbit = 1;
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PWMD1.reg = AT91C_BASE_PWMC_CH0;
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PWMD1.pins = &PWMP1;
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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pwmObjectInit(&PWMD2);
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PWMD2.chbit = 2;
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PWMD2.reg = AT91C_BASE_PWMC_CH1;
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PWMD2.pins = &PWMP2;
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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pwmObjectInit(&PWMD3);
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PWMD3.chbit = 4;
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PWMD3.reg = AT91C_BASE_PWMC_CH2;
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PWMD3.pins = &PWMP3;
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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pwmObjectInit(&PWMD4);
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PWMD4.chbit = 8;
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PWMD4.reg = AT91C_BASE_PWMC_CH3;
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PWMD4.pins = &PWMP4;
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#endif
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/* Turn on PWM in the power management controller */
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PWMC);
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/* Setup interrupt handler */
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PWMC_M->PWMC_IDR = 0xFFFFFFFF;
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AIC_ConfigureIT(AT91C_ID_PWMC,
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AT91C_AIC_SRCTYPE_HIGH_LEVEL | AT91SAM7_PWM_PRIORITY,
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PWMIrqHandler);
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AIC_EnableIT(AT91C_ID_PWMC);
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}
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/**
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* @brief Configures and activates the PWM peripheral.
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*
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* @param[in] pwmp pointer to the @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_start(PWMDriver *pwmp) {
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uint32_t mode, mr, div, pre;
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/* Steps:
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1. Turn the IO pin to a PWM output
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2. Configuration of Clock if DIVA or DIVB used
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3. Selection of the clock for each channel (CPRE field in the PWM_CMRx register)
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4. Configuration of the waveform alignment for each channel (CALG field in the PWM_CMRx register)
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5. Configuration of the output waveform polarity for each channel (CPOL in the PWM_CMRx register)
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6. Configuration of the period for each channel (CPRD in the PWM_CPRDx register). Writing in
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PWM_CPRDx Register is possible while the channel is disabled. After validation of the
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channel, the user must use PWM_CUPDx Register to update PWM_CPRDx
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7. Enable Interrupts (Writing CHIDx in the PWM_IER register)
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*/
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/* Make sure it is off first */
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pwm_lld_disable_channel(pwmp, 0);
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/* Configuration.*/
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mode = pwmp->config->channels[0].mode;
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/* Step 1 */
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if (mode & PWM_OUTPUT_PIN1) {
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pwmp->pins->pin[0].perab[0] = pwmp->pins->pin[0].portpin; /* Select A or B peripheral */
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pwmp->pins->pin[0].pio->PIO_PDR = pwmp->pins->pin[0].portpin; /* Turn PIO into PWM output */
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pwmp->pins->pin[0].pio->PIO_MDDR = pwmp->pins->pin[0].portpin; /* Turn off PIO multi-drive */
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if (mode & PWM_DISABLEPULLUP_PIN1)
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pwmp->pins->pin[0].pio->PIO_PPUDR = pwmp->pins->pin[0].portpin; /* Turn off PIO pullup */
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else
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pwmp->pins->pin[0].pio->PIO_PPUER = pwmp->pins->pin[0].portpin; /* Turn on PIO pullup */
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}
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if (mode & PWM_OUTPUT_PIN2) {
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pwmp->pins->pin[1].perab[0] = pwmp->pins->pin[1].portpin;
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pwmp->pins->pin[1].pio->PIO_PDR = pwmp->pins->pin[1].portpin;
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pwmp->pins->pin[1].pio->PIO_MDDR = pwmp->pins->pin[1].portpin;
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if (mode & PWM_DISABLEPULLUP_PIN2)
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pwmp->pins->pin[1].pio->PIO_PPUDR = pwmp->pins->pin[1].portpin;
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else
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pwmp->pins->pin[1].pio->PIO_PPUER = pwmp->pins->pin[1].portpin;
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}
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if ((mode & PWM_OUTPUT_PIN3) && pwmp->pins->pin[2].portpin) {
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pwmp->pins->pin[2].perab[0] = pwmp->pins->pin[2].portpin;
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pwmp->pins->pin[2].pio->PIO_PDR = pwmp->pins->pin[2].portpin;
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||||
pwmp->pins->pin[2].pio->PIO_MDDR = pwmp->pins->pin[2].portpin;
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if (mode & PWM_DISABLEPULLUP_PIN3)
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pwmp->pins->pin[2].pio->PIO_PPUDR = pwmp->pins->pin[2].portpin;
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else
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pwmp->pins->pin[2].pio->PIO_PPUER = pwmp->pins->pin[2].portpin;
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||||
}
|
||||
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||||
/* Step 2 */
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||||
if ((mode & PWM_MCK_MASK) == PWM_MCK_DIV_CLKA) {
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||||
if (!pwmp->config->frequency) {
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||||
/* As slow as we go */
|
||||
PWMC_M->PWMC_MR = (PWMC_M->PWMC_MR & 0xFFFF0000) | (10 << 8) | (255 << 0);
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||||
} else if (pwmp->config->frequency > MCK) {
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||||
/* Just use MCLK */
|
||||
mode &= ~PWM_MCK_MASK;
|
||||
} else {
|
||||
div = MCK / pwmp->config->frequency;
|
||||
if (mode & PWM_OUTPUT_CENTER) div >>= 1;
|
||||
for(pre = 0; div > 255 && pre < 10; pre++) div >>= 1;
|
||||
if (div > 255) div = 255;
|
||||
PWMC_M->PWMC_MR = (PWMC_M->PWMC_MR & 0xFFFF0000) | (pre << 8) | (div << 0);
|
||||
}
|
||||
} else if ((mode & PWM_MCK_MASK) == PWM_MCK_DIV_CLKB) {
|
||||
if (!pwmp->config->frequency) {
|
||||
/* As slow as we go */
|
||||
PWMC_M->PWMC_MR = (PWMC_M->PWMC_MR & 0x0000FFFF) | (10 << 24) | (255 << 16);
|
||||
} else if (pwmp->config->frequency > MCK) {
|
||||
/* Just use MCLK */
|
||||
mode &= ~PWM_MCK_MASK;
|
||||
} else {
|
||||
div = MCK / pwmp->config->frequency;
|
||||
if (mode & PWM_OUTPUT_CENTER) div >>= 1;
|
||||
for(pre = 0; div > 255 && pre < 10; pre++) div >>= 1;
|
||||
if (div > 255) div = 255;
|
||||
PWMC_M->PWMC_MR = (PWMC_M->PWMC_MR & 0x0000FFFF) | (pre << 24) | (div << 16);
|
||||
}
|
||||
}
|
||||
|
||||
/* Step 3 -> 5 */
|
||||
mr = (mode & PWM_MCK_MASK) >> PWM_MCK_SHIFT;
|
||||
if (mode & PWM_OUTPUT_CENTER) mr |= AT91C_PWMC_CALG;
|
||||
if (mode & PWM_OUTPUT_ACTIVE_HIGH) mr |= AT91C_PWMC_CPOL;
|
||||
pwmp->reg->PWMC_CMR = mr;
|
||||
|
||||
/* Step 6 */
|
||||
pwmp->reg->PWMC_CPRDR = pwmp->period;
|
||||
|
||||
/* Step 7 */
|
||||
if (pwmp->config->channels[0].callback)
|
||||
PWMC_M->PWMC_IER = pwmp->chbit;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the PWM peripheral.
|
||||
*
|
||||
* @param[in] pwmp pointer to the @p PWMDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_stop(PWMDriver *pwmp) {
|
||||
/* Make sure it is off */
|
||||
pwm_lld_disable_channel(pwmp, 0);
|
||||
|
||||
/* Turn the pin back to a PIO pin - we have forgotten pull-up and multi-drive state for the pin though */
|
||||
if (pwmp->config->channels[0].mode & PWM_OUTPUT_PIN1)
|
||||
pwmp->pins->pin[0].pio->PIO_PER = pwmp->pins->pin[0].portpin;
|
||||
if (pwmp->config->channels[0].mode & PWM_OUTPUT_PIN2)
|
||||
pwmp->pins->pin[1].pio->PIO_PER = pwmp->pins->pin[1].portpin;
|
||||
if ((pwmp->config->channels[0].mode & PWM_OUTPUT_PIN3) && pwmp->pins->pin[2].portpin)
|
||||
pwmp->pins->pin[2].pio->PIO_PER = pwmp->pins->pin[2].portpin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the period the PWM peripheral.
|
||||
* @details This function changes the period of a PWM unit that has already
|
||||
* been activated using @p pwmStart().
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The PWM unit period is changed to the new value.
|
||||
* @note The function has effect at the next cycle start.
|
||||
* @note If a period is specified that is shorter than the pulse width
|
||||
* programmed in one of the channels then the behavior is not
|
||||
* guaranteed.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] period new cycle time in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) {
|
||||
pwmp->period = period;
|
||||
|
||||
if (PWMC_M->PWMC_SR & pwmp->chbit) {
|
||||
pwmp->reg->PWMC_CMR |= AT91C_PWMC_CPD;
|
||||
pwmp->reg->PWMC_CUPDR = period;
|
||||
} else {
|
||||
pwmp->reg->PWMC_CPRDR = period;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables a PWM channel.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The channel is active using the specified configuration.
|
||||
* @note Depending on the hardware implementation this function has
|
||||
* effect starting on the next cycle (recommended implementation)
|
||||
* or immediately (fallback implementation).
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
|
||||
* @param[in] width PWM pulse width as clock pulses number
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||||
pwmchannel_t UNUSED(channel),
|
||||
pwmcnt_t width) {
|
||||
/*
|
||||
6. Configuration of the duty cycle for each channel (CDTY in the PWM_CDTYx register).
|
||||
Writing in PWM_CDTYx Register is possible while the channel is disabled. After validation of
|
||||
the channel, the user must use PWM_CUPDx Register to update PWM_CDTYx.
|
||||
7. Enable the PWM channel (Writing CHIDx in the PWM_ENA register)
|
||||
*/
|
||||
|
||||
/* Step 6 */
|
||||
if (PWMC_M->PWMC_SR & pwmp->chbit) {
|
||||
pwmp->reg->PWMC_CMR &= ~AT91C_PWMC_CPD;
|
||||
pwmp->reg->PWMC_CUPDR = width;
|
||||
} else {
|
||||
pwmp->reg->PWMC_CDTYR = width;
|
||||
PWMC_M->PWMC_ENA = pwmp->chbit;
|
||||
}
|
||||
|
||||
/* Step 7 */
|
||||
PWMC_M->PWMC_ENA = pwmp->chbit;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables a PWM channel.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The channel is disabled and its output line returned to the
|
||||
* idle state.
|
||||
* @note Depending on the hardware implementation this function has
|
||||
* effect starting on the next cycle (recommended implementation)
|
||||
* or immediately (fallback implementation).
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t UNUSED(channel)) {
|
||||
PWMC_M->PWMC_IDR = pwmp->chbit;
|
||||
PWMC_M->PWMC_DIS = pwmp->chbit;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_PWM */
|
||||
|
||||
/** @} */
|
||||
Reference in New Issue
Block a user