mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2025-10-21 17:29:33 +00:00
ChibiOS 2.6.8, until I can figure out where to get it from git.
This commit is contained in:
Jared Boone
444
firmware/chibios/os/hal/platforms/AT91SAM7/serial_lld.c
Executable file
444
firmware/chibios/os/hal/platforms/AT91SAM7/serial_lld.c
Executable file
@@ -0,0 +1,444 @@
|
||||
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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|
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Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
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||||
You may obtain a copy of the License at
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||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
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||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
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||||
*/
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||||
/**
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* @file AT91SAM7/serial_lld.c
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* @brief AT91SAM7 low level serial driver code.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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#if (SAM7_PLATFORM == SAM7S64) || (SAM7_PLATFORM == SAM7S128) || \
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(SAM7_PLATFORM == SAM7S256) || (SAM7_PLATFORM == SAM7S512)
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#define SAM7_USART0_RX AT91C_PA5_RXD0
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#define SAM7_USART0_TX AT91C_PA6_TXD0
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#define SAM7_USART1_RX AT91C_PA21_RXD1
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#define SAM7_USART1_TX AT91C_PA22_TXD1
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#define SAM7_DBGU_RX AT91C_PA9_DRXD
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#define SAM7_DBGU_TX AT91C_PA10_DTXD
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#elif (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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#define SAM7_USART0_RX AT91C_PA0_RXD0
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#define SAM7_USART0_TX AT91C_PA1_TXD0
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#define SAM7_USART1_RX AT91C_PA5_RXD1
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#define SAM7_USART1_TX AT91C_PA6_TXD1
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#define SAM7_DBGU_RX AT91C_PA27_DRXD
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#define SAM7_DBGU_TX AT91C_PA28_DTXD
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#elif (SAM7_PLATFORM == SAM7A3)
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#define SAM7_USART0_RX AT91C_PA2_RXD0
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#define SAM7_USART0_TX AT91C_PA3_TXD0
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#define SAM7_USART1_RX AT91C_PA7_RXD1
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#define SAM7_USART1_TX AT91C_PA8_TXD1
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#define SAM7_USART2_RX AT91C_PA9_RXD2
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#define SAM7_USART2_TX AT91C_PA10_TXD2
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#define SAM7_DBGU_RX AT91C_PA30_DRXD
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#define SAM7_DBGU_TX AT91C_PA31_DTXD
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#else
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#error "serial lines not defined for this SAM7 version"
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#endif /* HAL_USE_SERIAL */
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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#if USE_SAM7_USART0 || defined(__DOXYGEN__)
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/** @brief USART0 serial driver identifier.*/
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SerialDriver SD1;
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#endif
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#if USE_SAM7_USART1 || defined(__DOXYGEN__)
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/** @brief USART1 serial driver identifier.*/
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SerialDriver SD2;
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#endif
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2 || defined(__DOXYGEN__)
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/** @brief USART2 serial driver identifier.*/
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SerialDriver SD3;
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#endif
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#endif
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#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
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/** @brief DBGU_UART serial driver identifier.*/
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SerialDriver SDDBG;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/** @brief Driver default configuration.*/
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static const SerialConfig default_config = {
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SERIAL_DEFAULT_BITRATE,
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AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK |
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AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT
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};
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/*===========================================================================*/
|
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief USART initialization.
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*
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* @param[in] sdp communication channel associated to the USART
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* @param[in] config the architecture-dependent serial driver configuration
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*/
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static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
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AT91PS_USART u = sdp->usart;
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/* Disables IRQ sources and stop operations.*/
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u->US_IDR = 0xFFFFFFFF;
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u->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA;
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/* New parameters setup.*/
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if (config->sc_mr & AT91C_US_OVER)
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u->US_BRGR = MCK / (config->sc_speed * 8);
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else
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u->US_BRGR = MCK / (config->sc_speed * 16);
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u->US_MR = config->sc_mr;
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u->US_RTOR = 0;
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u->US_TTGR = 0;
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/* Enables operations and IRQ sources.*/
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u->US_CR = AT91C_US_RXEN | AT91C_US_TXEN | AT91C_US_DTREN | AT91C_US_RTSEN;
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u->US_IER = AT91C_US_RXRDY | AT91C_US_OVRE | AT91C_US_FRAME | AT91C_US_PARE |
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AT91C_US_RXBRK;
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}
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/**
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* @brief USART de-initialization.
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*
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* @param[in] u pointer to an USART I/O block
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*/
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static void usart_deinit(AT91PS_USART u) {
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/* Disables IRQ sources and stop operations.*/
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u->US_IDR = 0xFFFFFFFF;
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u->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA;
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u->US_MR = 0;
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u->US_RTOR = 0;
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u->US_TTGR = 0;
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}
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/**
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* @brief Error handling routine.
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*
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* @param[in] err USART CSR register value
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* @param[in] sdp communication channel associated to the USART
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*/
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static void set_error(SerialDriver *sdp, AT91_REG csr) {
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flagsmask_t sts = 0;
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if (csr & AT91C_US_OVRE)
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sts |= SD_OVERRUN_ERROR;
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if (csr & AT91C_US_PARE)
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sts |= SD_PARITY_ERROR;
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if (csr & AT91C_US_FRAME)
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sts |= SD_FRAMING_ERROR;
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if (csr & AT91C_US_RXBRK)
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sts |= SD_BREAK_DETECTED;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, sts);
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chSysUnlockFromIsr();
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}
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#if defined(__GNUC__)
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__attribute__((noinline))
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#endif
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#if !USE_SAM7_DBGU_UART
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static
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#endif
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/**
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* @brief Common IRQ handler.
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*
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* @param[in] sdp communication channel associated to the USART
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*/
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void sd_lld_serve_interrupt(SerialDriver *sdp) {
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uint32_t csr;
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AT91PS_USART u = sdp->usart;
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csr = u->US_CSR;
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if (csr & AT91C_US_RXRDY) {
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chSysLockFromIsr();
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sdIncomingDataI(sdp, u->US_RHR);
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chSysUnlockFromIsr();
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}
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if ((u->US_IMR & AT91C_US_TXRDY) && (csr & AT91C_US_TXRDY)) {
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msg_t b;
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chSysLockFromIsr();
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b = chOQGetI(&sdp->oqueue);
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if (b < Q_OK) {
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chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
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u->US_IDR = AT91C_US_TXRDY;
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}
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else
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u->US_THR = b;
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chSysUnlockFromIsr();
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}
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csr &= (AT91C_US_OVRE | AT91C_US_FRAME | AT91C_US_PARE | AT91C_US_RXBRK);
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if (csr != 0) {
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set_error(sdp, csr);
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u->US_CR = AT91C_US_RSTSTA;
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}
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AT91C_BASE_AIC->AIC_EOICR = 0;
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}
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#if USE_SAM7_USART0 || defined(__DOXYGEN__)
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static void notify1(GenericQueue *qp) {
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(void)qp;
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AT91C_BASE_US0->US_IER = AT91C_US_TXRDY;
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}
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#endif
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#if USE_SAM7_USART1 || defined(__DOXYGEN__)
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static void notify2(GenericQueue *qp) {
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(void)qp;
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||||
AT91C_BASE_US1->US_IER = AT91C_US_TXRDY;
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}
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#endif
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2 || defined(__DOXYGEN__)
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static void notify3(GenericQueue *qp) {
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(void)qp;
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AT91C_BASE_US2->US_IER = AT91C_US_TXRDY;
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}
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#endif
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#endif /* (SAM7_PLATFORM == SAM7A3) */
|
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#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
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static void notify_dbg(GenericQueue *qp) {
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(void)qp;
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AT91C_BASE_DBGU->DBGU_IER = AT91C_US_TXRDY;
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}
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#endif
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|
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/*===========================================================================*/
|
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if USE_SAM7_USART0 || defined(__DOXYGEN__)
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/**
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* @brief USART0 interrupt handler.
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*
|
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* @isr
|
||||
*/
|
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CH_IRQ_HANDLER(USART0IrqHandler) {
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|
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CH_IRQ_PROLOGUE();
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sd_lld_serve_interrupt(&SD1);
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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#endif
|
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|
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#if USE_SAM7_USART1 || defined(__DOXYGEN__)
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/**
|
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* @brief USART1 interrupt handler.
|
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*
|
||||
* @isr
|
||||
*/
|
||||
CH_IRQ_HANDLER(USART1IrqHandler) {
|
||||
|
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CH_IRQ_PROLOGUE();
|
||||
sd_lld_serve_interrupt(&SD2);
|
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AT91C_BASE_AIC->AIC_EOICR = 0;
|
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CH_IRQ_EPILOGUE();
|
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}
|
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#endif
|
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|
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#if (SAM7_PLATFORM == SAM7A3)
|
||||
#if USE_SAM7_USART2 || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief USART2 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
CH_IRQ_HANDLER(USART2IrqHandler) {
|
||||
|
||||
CH_IRQ_PROLOGUE();
|
||||
sd_lld_serve_interrupt(&SD3);
|
||||
AT91C_BASE_AIC->AIC_EOICR = 0;
|
||||
CH_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
|
||||
/* note - DBGU_UART IRQ is the SysIrq in board.c
|
||||
since it's not vectored separately by the AIC.*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_init(void) {
|
||||
|
||||
#if USE_SAM7_USART0
|
||||
sdObjectInit(&SD1, NULL, notify1);
|
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SD1.usart = AT91C_BASE_US0;
|
||||
AT91C_BASE_PIOA->PIO_PDR = SAM7_USART0_RX | SAM7_USART0_TX;
|
||||
AT91C_BASE_PIOA->PIO_ASR = SAM7_USART0_RX | SAM7_USART0_TX;
|
||||
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_USART0_RX | SAM7_USART0_TX;
|
||||
AIC_ConfigureIT(AT91C_ID_US0,
|
||||
AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART0_PRIORITY,
|
||||
USART0IrqHandler);
|
||||
#endif
|
||||
|
||||
#if USE_SAM7_USART1
|
||||
sdObjectInit(&SD2, NULL, notify2);
|
||||
SD2.usart = AT91C_BASE_US1;
|
||||
AT91C_BASE_PIOA->PIO_PDR = SAM7_USART1_RX | SAM7_USART1_TX;
|
||||
AT91C_BASE_PIOA->PIO_ASR = SAM7_USART1_RX | SAM7_USART1_TX;
|
||||
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_USART1_RX | SAM7_USART1_TX;
|
||||
AIC_ConfigureIT(AT91C_ID_US1,
|
||||
AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART1_PRIORITY,
|
||||
USART1IrqHandler);
|
||||
#endif
|
||||
|
||||
#if (SAM7_PLATFORM == SAM7A3)
|
||||
#if USE_SAM7_USART2
|
||||
sdObjectInit(&SD3, NULL, notify3);
|
||||
SD3.usart = AT91C_BASE_US2;
|
||||
AT91C_BASE_PIOA->PIO_PDR = SAM7_USART2_RX | SAM7_USART2_TX;
|
||||
AT91C_BASE_PIOA->PIO_ASR = SAM7_USART2_RX | SAM7_USART2_TX;
|
||||
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_USART2_RX | SAM7_USART2_TX;
|
||||
AIC_ConfigureIT(AT91C_ID_US2,
|
||||
AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART2_PRIORITY,
|
||||
USART2IrqHandler);
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
|
||||
#if USE_SAM7_DBGU_UART
|
||||
sdObjectInit(&SDDBG, NULL, notify_dbg);
|
||||
/* this is a little cheap, but OK for now since there's enough overlap
|
||||
between dbgu and usart register maps. it means we can reuse all the
|
||||
same usart interrupt handling and config that already exists.*/
|
||||
SDDBG.usart = (AT91PS_USART)AT91C_BASE_DBGU;
|
||||
AT91C_BASE_PIOA->PIO_PDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
|
||||
AT91C_BASE_PIOA->PIO_ASR = SAM7_DBGU_RX | SAM7_DBGU_TX;
|
||||
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver configuration and (re)start.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
* @param[in] config the architecture-dependent serial driver configuration.
|
||||
* If this parameter is set to @p NULL then a default
|
||||
* configuration is used.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
|
||||
|
||||
if (config == NULL)
|
||||
config = &default_config;
|
||||
|
||||
if (sdp->state == SD_STOP) {
|
||||
#if USE_SAM7_USART0
|
||||
if (&SD1 == sdp) {
|
||||
/* Starts the clock and clears possible sources of immediate interrupts.*/
|
||||
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0);
|
||||
/* Enables associated interrupt vector.*/
|
||||
AIC_EnableIT(AT91C_ID_US0);
|
||||
}
|
||||
#endif
|
||||
#if USE_SAM7_USART1
|
||||
if (&SD2 == sdp) {
|
||||
/* Starts the clock and clears possible sources of immediate interrupts.*/
|
||||
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
|
||||
/* Enables associated interrupt vector.*/
|
||||
AIC_EnableIT(AT91C_ID_US1);
|
||||
}
|
||||
#endif
|
||||
#if (SAM7_PLATFORM == SAM7A3)
|
||||
#if USE_SAM7_USART2
|
||||
if (&SD3 == sdp) {
|
||||
/* Starts the clock and clears possible sources of immediate interrupts.*/
|
||||
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US2);
|
||||
/* Enables associated interrupt vector.*/
|
||||
AIC_EnableIT(AT91C_ID_US2);
|
||||
}
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
/* Note - no explicit start for SD3 (DBGU_UART) since it's not included
|
||||
in the AIC or PMC.*/
|
||||
}
|
||||
usart_init(sdp, config);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver stop.
|
||||
* @details De-initializes the USART, stops the associated clock, resets the
|
||||
* interrupt vector.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_stop(SerialDriver *sdp) {
|
||||
|
||||
if (sdp->state == SD_READY) {
|
||||
usart_deinit(sdp->usart);
|
||||
#if USE_SAM7_USART0
|
||||
if (&SD1 == sdp) {
|
||||
AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_US0);
|
||||
AIC_DisableIT(AT91C_ID_US0);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
#if USE_SAM7_USART1
|
||||
if (&SD2 == sdp) {
|
||||
AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_US1);
|
||||
AIC_DisableIT(AT91C_ID_US1);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
#if USE_SAM7_DBGU_UART
|
||||
if (&SDDBG == sdp) {
|
||||
AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF;
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_SERIAL */
|
||||
|
||||
/** @} */
|
||||
Reference in New Issue
Block a user