mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2025-08-23 14:57:29 +00:00
ChibiOS 2.6.8, until I can figure out where to get it from git.
This commit is contained in:
662
firmware/chibios/os/hal/platforms/STM32L1xx/stm32_rcc.h
Executable file
662
firmware/chibios/os/hal/platforms/STM32L1xx/stm32_rcc.h
Executable file
@@ -0,0 +1,662 @@
|
||||
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
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||||
You may obtain a copy of the License at
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||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
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||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
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||||
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||||
/**
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* @file STM32L1xx/stm32_rcc.h
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* @brief RCC helper driver header.
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* @note This file requires definitions from the ST header file
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* @p stm32l1xx.h.
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*
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* @addtogroup STM32L1xx_RCC
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* @{
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*/
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#ifndef _STM32_RCC_
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#define _STM32_RCC_
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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||||
/* Driver pre-compile time settings. */
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/*===========================================================================*/
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||||
/*===========================================================================*/
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||||
/* Derived constants and error checks. */
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/*===========================================================================*/
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||||
/*===========================================================================*/
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||||
/* Driver data structures and types. */
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||||
/*===========================================================================*/
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||||
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* @name Generic RCC operations
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* @{
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*/
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/**
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* @brief Enables the clock of one or more peripheral on the APB1 bus.
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*
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* @param[in] mask APB1 peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableAPB1(mask, lp) { \
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RCC->APB1ENR |= (mask); \
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if (lp) \
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RCC->APB1LPENR |= (mask); \
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}
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/**
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* @brief Disables the clock of one or more peripheral on the APB1 bus.
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*
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* @param[in] mask APB1 peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableAPB1(mask, lp) { \
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RCC->APB1ENR &= ~(mask); \
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if (lp) \
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RCC->APB1LPENR &= ~(mask); \
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}
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/**
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* @brief Resets one or more peripheral on the APB1 bus.
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*
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* @param[in] mask APB1 peripherals mask
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*
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* @api
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*/
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#define rccResetAPB1(mask) { \
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RCC->APB1RSTR |= (mask); \
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RCC->APB1RSTR = 0; \
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}
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/**
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* @brief Enables the clock of one or more peripheral on the APB2 bus.
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*
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* @param[in] mask APB2 peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableAPB2(mask, lp) { \
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RCC->APB2ENR |= (mask); \
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if (lp) \
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RCC->APB2LPENR |= (mask); \
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}
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/**
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* @brief Disables the clock of one or more peripheral on the APB2 bus.
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*
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* @param[in] mask APB2 peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableAPB2(mask, lp) { \
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RCC->APB2ENR &= ~(mask); \
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if (lp) \
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RCC->APB2LPENR &= ~(mask); \
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}
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/**
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* @brief Resets one or more peripheral on the APB2 bus.
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*
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* @param[in] mask APB2 peripherals mask
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*
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* @api
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*/
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#define rccResetAPB2(mask) { \
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RCC->APB2RSTR |= (mask); \
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RCC->APB2RSTR = 0; \
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}
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/**
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* @brief Enables the clock of one or more peripheral on the AHB bus.
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*
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* @param[in] mask AHB peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableAHB(mask, lp) { \
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RCC->AHBENR |= (mask); \
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if (lp) \
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RCC->AHBLPENR |= (mask); \
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}
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/**
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* @brief Disables the clock of one or more peripheral on the AHB bus.
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*
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* @param[in] mask AHB peripherals mask
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableAHB(mask, lp) { \
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RCC->AHBENR &= ~(mask); \
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if (lp) \
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RCC->AHBLPENR &= ~(mask); \
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}
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/**
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* @brief Resets one or more peripheral on the AHB bus.
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*
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* @param[in] mask AHB peripherals mask
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*
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* @api
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*/
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#define rccResetAHB(mask) { \
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RCC->AHBRSTR |= (mask); \
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RCC->AHBRSTR = 0; \
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}
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/** @} */
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/**
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* @name ADC peripherals specific RCC operations
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* @{
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*/
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/**
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* @brief Enables the ADC1 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableADC1(lp) rccEnableAPB2(RCC_APB2ENR_ADC1EN, lp)
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/**
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* @brief Disables the ADC1 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp)
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/**
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* @brief Resets the ADC1 peripheral.
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*
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||||
* @api
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||||
*/
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#define rccResetADC1() rccResetAPB2(RCC_APB2RSTR_ADC1RST)
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/** @} */
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/**
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* @name DMA peripheral specific RCC operations
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||||
* @{
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||||
*/
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/**
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* @brief Enables the DMA1 peripheral clock.
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*
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* @param[in] lp low power enable flag
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||||
*
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||||
* @api
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||||
*/
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#define rccEnableDMA1(lp) rccEnableAHB(RCC_AHBENR_DMA1EN, lp)
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/**
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* @brief Disables the DMA1 peripheral clock.
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*
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||||
* @param[in] lp low power enable flag
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||||
*
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* @api
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||||
*/
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#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp)
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/**
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* @brief Resets the DMA1 peripheral.
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*
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* @api
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*/
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#define rccResetDMA1() rccResetAHB(RCC_AHBRSTR_DMA1RST)
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/** @} */
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/**
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* @name PWR interface specific RCC operations
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||||
* @{
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||||
*/
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||||
/**
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* @brief Enables the PWR interface clock.
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* @note The @p lp parameter is ignored in this family.
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||||
*
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||||
* @param[in] lp low power enable flag
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||||
*
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||||
* @api
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||||
*/
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#define rccEnablePWRInterface(lp) rccEnableAPB1(RCC_APB1ENR_PWREN, lp)
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/**
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* @brief Disables PWR interface clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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||||
*
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||||
* @api
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||||
*/
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#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp)
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/**
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* @brief Resets the PWR interface.
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*
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* @api
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||||
*/
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#define rccResetPWRInterface() rccResetAPB1(RCC_APB1RSTR_PWRRST)
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/** @} */
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/**
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* @name I2C peripherals specific RCC operations
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||||
* @{
|
||||
*/
|
||||
/**
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||||
* @brief Enables the I2C1 peripheral clock.
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||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableI2C1(lp) rccEnableAPB1(RCC_APB1ENR_I2C1EN, lp)
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|
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/**
|
||||
* @brief Disables the I2C1 peripheral clock.
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||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp)
|
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|
||||
/**
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||||
* @brief Resets the I2C1 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
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#define rccResetI2C1() rccResetAPB1(RCC_APB1RSTR_I2C1RST)
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|
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/**
|
||||
* @brief Enables the I2C2 peripheral clock.
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||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
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#define rccEnableI2C2(lp) rccEnableAPB1(RCC_APB1ENR_I2C2EN, lp)
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|
||||
/**
|
||||
* @brief Disables the I2C2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the I2C2 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetI2C2() rccResetAPB1(RCC_APB1RSTR_I2C2RST)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name SPI peripherals specific RCC operations
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables the SPI1 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableSPI1(lp) rccEnableAPB2(RCC_APB2ENR_SPI1EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the SPI1 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the SPI1 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetSPI1() rccResetAPB2(RCC_APB2RSTR_SPI1RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableSPI2(lp) rccEnableAPB1(RCC_APB1ENR_SPI2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the SPI2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the SPI2 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetSPI2() rccResetAPB1(RCC_APB1RSTR_SPI2RST)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TIM peripherals specific RCC operations
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables the TIM2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM2(lp) rccEnableAPB1(RCC_APB1ENR_TIM2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM2 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM2() rccResetAPB1(RCC_APB1RSTR_TIM2RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the TIM3 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM3(lp) rccEnableAPB1(RCC_APB1ENR_TIM3EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM3 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM3 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM3() rccResetAPB1(RCC_APB1RSTR_TIM3RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the TIM4 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM4(lp) rccEnableAPB1(RCC_APB1ENR_TIM4EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM4 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM4 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM4() rccResetAPB1(RCC_APB1RSTR_TIM4RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the TIM9 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM9 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM9 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the TIM10 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM10(lp) rccEnableAPB2(RCC_APB2ENR_TIM10EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM10 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM10 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM10() rccResetAPB2(RCC_APB2RSTR_TIM10RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the TIM10 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableTIM11(lp) rccEnableAPB2(RCC_APB2ENR_TIM11EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the TIM11 peripheral clock.
|
||||
* @note The @p lp parameter is ignored in this family.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the TIM11 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetTIM11() rccResetAPB2(RCC_APB2RSTR_TIM11RST)
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name USART/UART peripherals specific RCC operations
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables the USART1 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableUSART1(lp) rccEnableAPB2(RCC_APB2ENR_USART1EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the USART1 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the USART1 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetUSART1() rccResetAPB2(RCC_APB2RSTR_USART1RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the USART2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableUSART2(lp) rccEnableAPB1(RCC_APB1ENR_USART2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the USART2 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the USART2 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
|
||||
|
||||
/**
|
||||
* @brief Enables the USART3 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableUSART3(lp) rccEnableAPB1(RCC_APB1ENR_USART3EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the USART3 peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the USART3 peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetUSART3() rccResetAPB1(RCC_APB1RSTR_USART3RST)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name USB peripheral specific RCC operations
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables the USB peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccEnableUSB(lp) rccEnableAPB1(RCC_APB1ENR_USBEN, lp)
|
||||
|
||||
/**
|
||||
* @brief Disables the USB peripheral clock.
|
||||
*
|
||||
* @param[in] lp low power enable flag
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp)
|
||||
|
||||
/**
|
||||
* @brief Resets the USB peripheral.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
#define rccResetUSB() rccResetAPB1(RCC_APB1RSTR_USBRST)
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _STM32_RCC_ */
|
||||
|
||||
/** @} */
|
Reference in New Issue
Block a user