mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2025-08-24 22:27:53 +00:00
ChibiOS 2.6.8, until I can figure out where to get it from git.
This commit is contained in:
Jared Boone
178
firmware/chibios/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
Executable file
178
firmware/chibios/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
Executable file
@@ -0,0 +1,178 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* SPC560P44 memory setup.
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*/
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__irq_stack_size__ = 0x0000; /* Not yet used.*/
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__process_stack_size__ = 0x0800;
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MEMORY
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{
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flash : org = 0x00000000, len = 384k
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dataflash : org = 0x00800000, len = 64k
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ram : org = 0x40000000, len = 36k
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}
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ENTRY(_reset_address)
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/*
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* Derived constants.
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*/
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__flash_size__ = LENGTH(flash);
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__flash_start__ = ORIGIN(flash);
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__flash_end__ = ORIGIN(flash) + LENGTH(flash);
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__ram_size__ = LENGTH(ram);
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__ram_start__ = ORIGIN(ram);
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__ram_end__ = ORIGIN(ram) + LENGTH(ram);
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SECTIONS
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{
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. = ORIGIN(flash);
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.boot : ALIGN(16) SUBALIGN(16)
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{
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KEEP(*(.bam))
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KEEP(*(.coreinit))
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KEEP(*(.handlers))
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KEEP(*(.crt0))
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. = ALIGN(0x00000800);
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KEEP(*(.vectors))
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/* Note, have to waste the first 64KB because the IVPR register
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requires an alignment of 64KB and the first 64KB cannot be used,
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IVOR0 would conflict with the BAM word. Applications could
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allocate code or data in the first 64KB by using special sections.*/
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. = ALIGN(0x00010000);
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__ivpr_base__ = .;
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KEEP(*(.ivors))
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} > flash
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constructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE(__init_array_end = .);
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} > flash
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destructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__fini_array_start = .);
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KEEP(*(.fini_array))
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KEEP(*(SORT(.fini_array.*)))
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PROVIDE(__fini_array_end = .);
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} > flash
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.text_vle : ALIGN(16) SUBALIGN(16)
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{
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*(.text_vle)
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*(.text_vle.*)
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*(.gnu.linkonce.t_vle.*)
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} > flash
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.text : ALIGN(16) SUBALIGN(16)
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{
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*(.text)
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*(.text.*)
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*(.gnu.linkonce.t.*)
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} > flash
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.rodata : ALIGN(16) SUBALIGN(16)
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{
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*(.glue_7t)
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*(.glue_7)
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*(.gcc*)
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*(.rodata)
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*(.rodata.*)
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*(.rodata1)
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} > flash
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.sdata2 : ALIGN(16) SUBALIGN(16)
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{
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__sdata2_start__ = . + 0x8000;
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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} > flash
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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} > flash
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.eh_frame : ONLY_IF_RO
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{
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*(.eh_frame)
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} > flash
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.romdata : ALIGN(16) SUBALIGN(16)
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{
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__romdata_start__ = .;
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} > flash
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.stacks :
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{
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. = ALIGN(8);
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__irq_stack_base__ = .;
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. += __irq_stack_size__;
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. = ALIGN(8);
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__irq_stack_end__ = .;
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__process_stack_base__ = .;
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__main_thread_stack_base__ = .;
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. += __process_stack_size__;
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. = ALIGN(8);
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__process_stack_end__ = .;
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__main_thread_stack_end__ = .;
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} > ram
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.data : AT(__romdata_start__)
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{
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. = ALIGN(4);
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__data_start__ = .;
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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__sdata_start__ = . + 0x8000;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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__data_end__ = .;
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} > ram
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.sbss :
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{
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__bss_start__ = .;
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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} > ram
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.bss :
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{
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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__bss_end__ = .;
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} > ram
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__heap_base__ = __bss_end__;
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__heap_end__ = __ram_end__;
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}
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178
firmware/chibios/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P50.ld
Executable file
178
firmware/chibios/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P50.ld
Executable file
@@ -0,0 +1,178 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* SPC560P44 memory setup.
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*/
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__irq_stack_size__ = 0x0000; /* Not yet used.*/
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__process_stack_size__ = 0x0800;
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MEMORY
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{
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flash : org = 0x00000000, len = 512k
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dataflash : org = 0x00800000, len = 64k
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ram : org = 0x40000000, len = 40k
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}
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ENTRY(_reset_address)
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/*
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* Derived constants.
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*/
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__flash_size__ = LENGTH(flash);
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__flash_start__ = ORIGIN(flash);
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__flash_end__ = ORIGIN(flash) + LENGTH(flash);
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__ram_size__ = LENGTH(ram);
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__ram_start__ = ORIGIN(ram);
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__ram_end__ = ORIGIN(ram) + LENGTH(ram);
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SECTIONS
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{
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. = ORIGIN(flash);
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.boot : ALIGN(16) SUBALIGN(16)
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{
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KEEP(*(.bam))
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KEEP(*(.coreinit))
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KEEP(*(.handlers))
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KEEP(*(.crt0))
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. = ALIGN(0x00000800);
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KEEP(*(.vectors))
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/* Note, have to waste the first 64KB because the IVPR register
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requires an alignment of 64KB and the first 64KB cannot be used,
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IVOR0 would conflict with the BAM word. Applications could
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allocate code or data in the first 64KB by using special sections.*/
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. = ALIGN(0x00010000);
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__ivpr_base__ = .;
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KEEP(*(.ivors))
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} > flash
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constructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE(__init_array_end = .);
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} > flash
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destructors : ALIGN(4) SUBALIGN(4)
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{
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PROVIDE(__fini_array_start = .);
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KEEP(*(.fini_array))
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KEEP(*(SORT(.fini_array.*)))
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PROVIDE(__fini_array_end = .);
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} > flash
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.text_vle : ALIGN(16) SUBALIGN(16)
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{
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*(.text_vle)
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*(.text_vle.*)
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*(.gnu.linkonce.t_vle.*)
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} > flash
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.text : ALIGN(16) SUBALIGN(16)
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{
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*(.text)
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*(.text.*)
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*(.gnu.linkonce.t.*)
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} > flash
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.rodata : ALIGN(16) SUBALIGN(16)
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{
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*(.glue_7t)
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*(.glue_7)
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*(.gcc*)
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*(.rodata)
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*(.rodata.*)
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*(.rodata1)
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} > flash
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.sdata2 : ALIGN(16) SUBALIGN(16)
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{
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__sdata2_start__ = . + 0x8000;
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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} > flash
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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} > flash
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.eh_frame : ONLY_IF_RO
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{
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*(.eh_frame)
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} > flash
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.romdata : ALIGN(16) SUBALIGN(16)
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{
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__romdata_start__ = .;
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} > flash
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.stacks :
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{
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. = ALIGN(8);
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__irq_stack_base__ = .;
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. += __irq_stack_size__;
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. = ALIGN(8);
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__irq_stack_end__ = .;
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__process_stack_base__ = .;
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__main_thread_stack_base__ = .;
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. += __process_stack_size__;
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. = ALIGN(8);
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__process_stack_end__ = .;
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__main_thread_stack_end__ = .;
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} > ram
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.data : AT(__romdata_start__)
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{
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. = ALIGN(4);
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__data_start__ = .;
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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__sdata_start__ = . + 0x8000;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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__data_end__ = .;
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} > ram
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.sbss :
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{
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__bss_start__ = .;
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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} > ram
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.bss :
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{
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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__bss_end__ = .;
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} > ram
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__heap_base__ = __bss_end__;
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__heap_end__ = __ram_end__;
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}
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