mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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ChibiOS 2.6.8, until I can figure out where to get it from git.
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134
firmware/chibios/testhal/STM32F1xx/SPI/main.c
Executable file
134
firmware/chibios/testhal/STM32F1xx/SPI/main.c
Executable file
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/*
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* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig hs_spicfg = {
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NULL,
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GPIOA,
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GPIOA_SPI1NSS,
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0
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};
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/*
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* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig ls_spicfg = {
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NULL,
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GPIOA,
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GPIOA_SPI1NSS,
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SPI_CR1_BR_2 | SPI_CR1_BR_1
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};
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/*
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* SPI TX and RX buffers.
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*/
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static uint8_t txbuf[512];
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static uint8_t rxbuf[512];
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/*
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* SPI bus contender 1.
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*/
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static WORKING_AREA(spi_thread_1_wa, 256);
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static msg_t spi_thread_1(void *p) {
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(void)p;
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chRegSetThreadName("SPI thread 1");
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while (TRUE) {
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spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */
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palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */
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spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID1); /* Slave Select assertion. */
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spiExchange(&SPID1, 512,
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txbuf, rxbuf); /* Atomic transfer operations. */
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spiUnselect(&SPID1); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID1); /* Ownership release. */
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}
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return 0;
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}
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/*
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* SPI bus contender 2.
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*/
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static WORKING_AREA(spi_thread_2_wa, 256);
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static msg_t spi_thread_2(void *p) {
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(void)p;
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chRegSetThreadName("SPI thread 2");
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while (TRUE) {
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spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */
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palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */
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spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */
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spiSelect(&SPID1); /* Slave Select assertion. */
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spiExchange(&SPID1, 512,
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txbuf, rxbuf); /* Atomic transfer operations. */
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spiUnselect(&SPID1); /* Slave Select de-assertion. */
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spiReleaseBus(&SPID1); /* Ownership release. */
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}
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return 0;
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}
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/*
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* Application entry point.
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*/
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int main(void) {
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unsigned i;
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/*
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* SPI1 I/O pins setup.
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*/
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palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */
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palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/
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palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/
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palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(IOPORT1, GPIOA_SPI1NSS);
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/*
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* Prepare transmit pattern.
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*/
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for (i = 0; i < sizeof(txbuf); i++)
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txbuf[i] = (uint8_t)i;
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/*
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* Starting the transmitter and receiver threads.
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*/
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chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
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NORMALPRIO + 1, spi_thread_1, NULL);
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chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa),
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NORMALPRIO + 1, spi_thread_2, NULL);
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/*
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* Normal main() thread activity, in this demo it does nothing.
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*/
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while (TRUE) {
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chThdSleepMilliseconds(500);
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}
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return 0;
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}
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