Commit Graph

1922 Commits

Author SHA1 Message Date
eried
3190eec36a Title was too long 2020-06-28 15:41:55 +02:00
eried
65ab23fd3c Comma as separator 2020-06-28 14:19:09 +02:00
euquiq
8443008dfa New Antenna length Calculator
It reads the antennas definition from a txt file:

WHIPCALC/ANTENNAS.TXT

Inside the textfile you place each antenna you own with the following sintaxis:

<antenna label> <elements length in mm, separated by a space>

For example:

ANT500 185 315 450 586 724 862

Input the required frequency, adjust the wave type (full / half / quarter, etc.) and the calculator will return the antenna length (metric and imperial) while also calculating how much you need to expand the fitting antennas you got defined on the txt.

It may return up to 8 matching antennas, which is more than enough (normally you will have 2, perhaps 3 telescopic antennas around for your portapack)

If by any chance your antennas txt got more than 8 antennas, and more than 8 matches the length of the freq / wave you want, it will only show the first 8 matching antennas and will warn you at the bottom that there are even more results (hidden).

All calculations now are rounded into the best integer, considering first decimal, so precision is double than the original antenna calculator app.
2020-06-27 23:59:11 -03:00
euquiq
77b56810e8 GPS SIMULATOR EXIT ON PLAY FIX
Now, if you exit the GPS SIMULATOR while transmitting, it will properly stop the radio and won't crash, exiting as expected.
2020-06-16 02:18:29 -03:00
euquiq
46c076c296 Antenna length Calculator fix
Calculation now rounds up decimals so result is more accurate.
2020-06-13 21:21:32 -03:00
eried
7d5d9054e1 Version bump 2020-06-09 23:44:16 +02:00
eried
62652fdd8a Debug sd card verbose by @gregoryfenton 2020-06-09 23:43:45 +02:00
eried
934f4b07c4 Speaker option for the H1 2020-06-08 01:23:44 +02:00
eried
bf3f9cfe75 Setting for hiding the speaker 2020-06-08 01:23:23 +02:00
eried
3c304b9fe3 Mute and unmute audio 2020-06-08 01:22:58 +02:00
eried
2d765f8120 Persistent setting for speaker icon 2020-06-08 01:21:11 +02:00
eried
e4c9287af3 Icon for muted speaker 2020-06-08 01:15:52 +02:00
Gregory Fenton
07e9b50abe
Remove clunky text when changing to HackRF mode 2020-06-07 20:22:04 +01:00
eried
a5721c5444 Update ui_scanner.cpp 2020-06-07 19:16:54 +02:00
Erwin Ried
0afc88ea7b
Merge pull request #60 from eried/scanner-update
Scanner features (#55) - Added freq description to scanner display.
2020-06-07 16:18:13 +02:00
Jonathan Elder
cc75ed5eee
Scanner features (#55) - Added freq description to scanner display. 2020-06-07 12:03:45 +02:00
eried
43870e97bc Icons and colors changes 2020-06-07 06:27:59 +02:00
eried
0e75cfea12 New icons 2020-06-07 06:27:23 +02:00
eried
993396a048 Dark cyan for generic submenus 2020-06-07 06:26:19 +02:00
eried
cb0a4da7e1 Merge branch 'scanner-update' 2020-06-07 04:34:21 +02:00
eried
81d5ac4923 Update ui_scanner.hpp 2020-06-07 04:33:47 +02:00
eried
ef0336ac4f Adding missing tools icons 2020-06-07 01:58:31 +02:00
eried
e3533594de Update icon_soundboard.png 2020-06-07 01:58:19 +02:00
eried
db9d80dc0c New Icon files for Options 2020-06-07 01:40:31 +02:00
Jonathan Elder
7fa92868d7 Scanner update
Renamed scanner squelch to trigger
Added squelch for audio output
2020-06-06 11:45:19 -07:00
eried
38b6f334b2 Update ui_debug.cpp 2020-06-06 01:07:59 +02:00
eried
92d9b677f7 Update ui_debug.cpp 2020-06-05 23:58:12 +02:00
eried
8a6e04fc0b Icon for the peripherals 2020-06-05 23:58:04 +02:00
euquiq
74f76348b3 DEBUG -> PERIPHERALS is now a buttons based menu 2020-06-04 17:28:44 -03:00
Erwin Ried
a1a417d94b Icons for debug app 2020-06-03 21:37:08 +02:00
Gregory Fenton
eb3b7ac585
Weird characters appeared in hpp file, removed 2020-06-03 18:35:56 +01:00
Gregory Fenton
d7f3539cd9
Testing new debug icons 2020-06-03 18:32:12 +01:00
Gregory Fenton
853912733e
Add debug menu icons 2020-06-03 18:26:24 +01:00
Gregory Fenton
4dd73d201b
Fix disappearing icons
Icons disappear when they are rolled over using the jog wheel and the colour is set to
ui::color::white()
Fixed by changing the colours of the icons to something other than ui::color::white()
2020-06-03 12:38:05 +01:00
euquiq
2cd2443eb2
UI menu changes (#41)
* UI menu changes

Changed DEBUG menu style from text / scrollbar into buttons.

* Update ui_debug.cpp
2020-06-01 23:52:42 +02:00
Erwin Ried
59b310dff5 Friendlier UI in fileman 2020-06-01 01:59:40 +02:00
Erwin Ried
52b951f705 No space after question mark 2020-06-01 01:59:12 +02:00
Erwin Ried
29457f0e46 New icons 2020-05-31 20:21:54 +02:00
Erwin Ried
b539b17a50 Update ui_fileman.hpp
Icon for C8 files
2020-05-30 16:26:21 +02:00
Erwin Ried
2cdd11d96a More icon standarization 2020-05-30 16:26:06 +02:00
Erwin Ried
477635a100 Version bump 2020-05-30 01:42:08 +02:00
Erwin Ried
6c7dfbfc89 The more arrow looks better with 1 px spacing on some UIs 2020-05-30 01:42:00 +02:00
Erwin Ried
589611c8bd Control alignment on Fileman app 2020-05-30 01:39:08 +02:00
Erwin Ried
9a1d6aabe4 Merge branch 'master' of https://github.com/eried/portapack-mayhem 2020-05-30 01:38:28 +02:00
Jared Boone
f2886715ce
Stop replay before exiting Replay app, to avoid freeze. 2020-05-29 14:52:11 -07:00
Erwin Ried
defdd57ea3 Few more icons refreshed 2020-05-29 03:10:13 +02:00
Erwin Ried
acbb100d64 Fix for https://github.com/eried/portapack-mayhem/issues/35 Capture app hang on exit 2020-05-29 00:55:57 +02:00
Erwin Ried
9b010686b6 Tweaking more icons for consistency in style 2020-05-29 00:04:07 +02:00
Erwin Ried
9aa2d17753 Python3 compatibility 2020-05-29 00:03:47 +02:00
Erwin Ried
1ce4c402e0 Merge branch 'master' of https://github.com/eried/portapack-mayhem 2020-05-27 21:40:55 +02:00
Erwin Ried
decce5cc17 Revert "Adding 2 more steps to the frequency selector (#28)"
This reverts commit ebfcc81894.
2020-05-27 21:40:50 +02:00
Erwin Ried
125aa75553
fix OOK transmit - getting stuck after '12E' type
From 395bc486f1
2020-05-26 11:45:48 +02:00
Erwin Ried
687b1187d1 Version bump 2020-05-24 23:37:27 +02:00
Erwin Ried
a467e74a78 Minor UI changes to Soundboard 2020-05-24 23:34:49 +02:00
Erwin Ried
cfd1fe2b18 Progress bar fix 2020-05-23 22:53:20 +02:00
Erwin Ried
c80ea840d7 Version bump 2020-05-20 14:50:44 +02:00
Erwin Ried
f4ebf4a2d5 Removing more unnused files 2020-05-12 16:17:14 +02:00
Erwin Ried
7058c872f3 Fork rename 2020-05-12 16:12:16 +02:00
Erwin Ried
f1ca56b875 Update CMakeLists.txt 2020-05-12 10:31:55 +02:00
Erwin Ried
b5da065bbd More! 2020-05-11 16:59:48 +02:00
Erwin Ried
15a6bc17b5 More small tweaks to the icons 2020-05-11 16:33:53 +02:00
Erwin Ried
b48b0efe5c This color scheme looks solid, more small tweaks 2020-05-11 15:30:21 +02:00
Erwin Ried
904339370b Some new icons and colors 2020-05-11 14:19:39 +02:00
Erwin Ried
e6ca2541e1 Removing old files 2020-05-11 14:19:11 +02:00
Erwin Ried
11ad0e0933 Merge branch 'removing-not-implemented-and-play-dead-and-minor-tweaks' 2020-05-11 11:12:50 +02:00
Erwin Ried
cf75bb0db2 Remote is also not implemented 2020-05-11 11:12:01 +02:00
Erwin Ried
190379c626 Merge branch 'removing-not-implemented-and-play-dead-and-minor-tweaks' 2020-05-11 11:09:15 +02:00
Erwin Ried
f18d9f6ed1 Removing playdead related stuff and small tweaks 2020-05-11 11:08:22 +02:00
Erwin Ried
50b9f3219c Long titles corrupt the header 2020-05-11 11:08:00 +02:00
Erwin Ried
4597c61c57 Removing playdead calls, non-implemented entries in main menu, and small UI tweaks 2020-05-11 11:07:45 +02:00
Erwin Ried
ebfcc81894
Adding 2 more steps to the frequency selector (#28) 2020-05-11 09:14:39 +02:00
Erwin Ried
e890e77483
Merge pull request #22 from nemanjan00/patch-1
Do not turn off backlight, while typing
2020-05-10 16:58:09 +02:00
Erwin Ried
8071760d81 Update generate_world_map.bin.py 2020-05-10 16:55:27 +02:00
Erwin Ried
f9ec428950
New pretty font (#23)
* Update analog_audio_app.cpp (#353)

* Update ui_font_fixed_8x16.cpp
2020-05-10 16:14:20 +02:00
Nemanja Nedeljković
e1d80acba8
Do not turn off backlight, while typing
Touch event does not delay automatic backlight off
2020-05-09 16:23:22 +02:00
Erwin Ried
4aaac8545b
Pocsag improvements (#20)
* Update analog_audio_app.cpp (#353)

* Adding phase field (extracted from @jamesshao8 repo)
2020-05-09 13:13:21 +02:00
Erwin Ried
3e15baa251
Capture app fix (#19)
* Update analog_audio_app.cpp (#353)

* Update capture_app.cpp
2020-05-08 16:51:33 +02:00
Erwin Ried
69515d702d
Analog audio app m4 guru meditation bug (#18)
* Update analog_audio_app.cpp (#353)

* Update analog_audio_app.cpp
2020-05-08 15:01:03 +02:00
Erwin Ried
ff5db151b4
Update analog_audio_app.cpp (#16) 2020-05-08 13:14:49 +02:00
Erwin Ried
c76252b79c
Replacing the linear "aproximated" way with a proper one (#14) 2020-05-06 16:28:38 +02:00
Erwin Ried
176579b868 Small cleanup in tools 2020-05-05 12:42:40 +02:00
Erwin Ried
9e5068180b
Merge pull request #12 from eried/world-map-mercator
World map mercator
2020-05-02 16:36:47 +02:00
Erwin Ried
3e0be7979c Small styling change 2020-05-02 16:27:29 +02:00
Erwin Ried
24f060906e Update ui_geomap.cpp 2020-05-02 15:50:29 +02:00
Erwin Ried
b98e87284e Adjust for header 2020-05-02 15:42:54 +02:00
Erwin Ried
6a22fbf7a3
Merge pull request #11 from eried/world_map.py
Update world_map.py
2020-05-02 13:42:08 +02:00
Erwin Ried
f4461c4eda For bigger pictures 2020-05-02 13:03:54 +02:00
Erwin Ried
018bbdc190 Mercator projection 2020-05-02 13:01:23 +02:00
Erwin Ried
31a04f47de Update world_map.py 2020-05-02 11:42:36 +02:00
Erwin Ried
683bf5dfd9 Adding Debug app back 2020-04-21 14:22:09 +02:00
Erwin Ried
9ef3dd7260
Merge pull request #6 from furrtek/master
Update
2020-04-21 11:12:20 +02:00
Erwin Ried
9e5eebae39
Shao credits (#340)
* Update ui_about.hpp

* Small alignment fix
2020-04-21 01:50:31 +02:00
Erwin Ried
b0ca4fbe8e
Delete portapack-h1-havoc.bin (#341)
Old confusing firmware
2020-04-21 01:49:32 +02:00
Erwin Ried
d17130092c
Merge branch 'master' into gps-sim 2020-04-20 10:51:20 +02:00
Erwin Ried
07f0771cce
Merge pull request #3 from jamesshao8/shao-credits
Shao credits
2020-04-20 10:46:23 +02:00
Erwin Ried
bd05e11429 Small alignment fix 2020-04-20 10:37:29 +02:00
Erwin Ried
e43f814861
Analog tv app (#334)
* Analog TV app (PAL)

* Icon on main menu

* Analog TV should be yellow

Works for PAL only know, it would be nice to add NTSC in the future, or some customizable sync
2020-04-20 06:50:24 +02:00
Erwin Ried
40531e9230
Ble receiver (#337)
* BLE app

* Update ui_navigation.cpp

Co-authored-by: Furrtek <furrtek@gmail.com>
2020-04-20 06:50:03 +02:00
Erwin Ried
d95bda65ce
Nrf24l01 demodulation (#338)
* NRF demodulation

* Update ui_navigation.cpp
2020-04-20 06:45:28 +02:00
Erwin Ried
4f1337eb71 Update ui_about.hpp 2020-04-19 23:04:47 +02:00
Erwin Ried
b49740e451 Moving to transmitters menu 2020-04-18 11:28:03 +02:00
Erwin Ried
5ebc7cc665 Main menu icon for GPS sim 2020-04-18 01:17:13 +02:00
Erwin Ried
aa2eb86ae9 GPS Sim 2020-04-18 01:17:01 +02:00
Aurélien Hernandez
3dfbdc844c
Few improvements in ui_transmitter (#332)
* ui_transmitter : Added rf_amp field
* ui_transmitter : Added color grading depending on gain settings
* Removed TransmitterModel::set_rf_amp(bool) call from every apps loading ui_transmit
* transmitter_model : RF_amp disabled by default
* APRS Tx app : Fixed frequency keypad not showing up
* Morse Tx app : Removed TransmitterModel::set_lna() and TransmitterModel::set_vga() calls
2020-04-16 23:58:06 +02:00
Erwin Ried
d65a8929bc
Category label and entry to 12 chars (#324) 2020-04-12 15:26:20 +02:00
KimIV
127a7982c3
Update tpms_packet.cpp (#309)
I experimented with my sensors from a Ford Kuga. For data verification I used the Autel MaxiTPMS TS508 device.
2020-02-27 05:54:27 +01:00
Furrtek
8696146fab Contact info removal 2019-12-24 07:06:01 +01:00
Craig Leres
8fd2d4b1fc ADSB RX: fix negative lat/lon formatting and insure two decimal places (#293) 2019-12-23 01:55:08 +01:00
Ziggy
b690165da3 UI Redesign for Portapack-Havoc (#268)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Setup: Format clock reference frequency in MHz, not Hz.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.

* Pin config: VREGMODE=1, add other pins for completeness, comment detail

* Pin setup: More useful comments.

* Pin setup: Change some defaults, only set up PortaPack pins if detected.

* Pin setup: Disable LPC pull-ups on PP CPLD data bus, as CPLD is pulling up.

* Baseband: Allow larger HackRF firmware image.

* HackRF: Remove USER_INTERFACE CMake variable.

* CPLD: Make use of HackRF CPLD tool to generate code.

* Release: Add generation of MD5SUMS, SHA256SUMS during "make release"

* Clock generator: Match clock output currents to HackRF firmware.

Someday, we will share a code base again...

* CMake: Make "firmware" target part of the "all" target.

So now an unqualified "make" will make the firmware binary.

* CMake: Change how HackRF firmware is incorporated into binary.

Use the separate HackRF "RAM" binary. Get rid of the strip-dfu utility, since there's no longer a need to extract the binary from the DFU.

* CMake: Renamed GIT_REVISION* -> GIT_VERSION* to match HackRF build env.

* CMake: Bring git version handling closer to HackRF for code reuse.

* Travis-CI: Rework CI release artifact output.

* Travis-CI: Don't assign PROJECT_NAME within deploy-nightly.sh

* Travis-CI: Oops, don't include distro package for compiler...

...when also installing it from a third-party PPA.

* Travis-CI: Update GCC package, old one seems "retired"?

* Travis-CI: OK, the gcc-arm-none-eabi package is NOT current. Undoing...

* Travis-CI: Path oopsies.

* Travis-CI: More path confusion. I think this will do it. *touch wood*

* Travis-CI: Update build message sent to FreeNode #portapack IRC.

* Travis-CI: Break out BUILD_DATE from BUILD_NAME.

* Travis-CI: Introduce build directories, include MD5 and SHA256 hashes.

* Travis-CI: Fix MD5SUMS/SHA256SUMS paths.

* Travis-CI: Fix typo generating name for binary links.

* Power: Keep 1V8 off until after VAA is brought up.

* Power: Bring up VAA in several steps to keep voltage swing small.

* About: Show longer commit/tag version string.

* Versioning: Report non-CI builds with "local-" version prefix.

* Travis-CI: Report new nightly build site in IRC notification.

* Change use of GIT_VERSION to VERSION_STRING
Required by prior merge.

* Git: add "hackrf" submodule.

* CMake: Use hackrf submodule for build, stop pulling during build.

* Travis: Fix build paths due to CMake submodule changes.

* Travis: Explicitly update submodules recursively

* Revert "Travis: Explicitly update submodules recursively"

This reverts commit b246438d805f431e727e01b7407540e932e89ee1.

* Travis: Try to sort out hackrf submodule output paths...

* Travis: I don't know what I'm doing.

* CMake: "make firmware" problem due to target vs. path used for dependency.

* HackRF: Incorporate YAML security fix.

* CMake: Fix more places where targets should be used...

...instead of paths to outputs.

* CMake: Add DFU file to "make firmware" outputs

* HackRF: Update submodule for CMake m0_bin.s path fix.

* added encoder support to alphanum

* added encoder support to freq-keypad

* UI Redesign -
added BtnGrid & NewButton widgets and created a new button-based
layout, with both encoder and touchscreen are supported.

* Scanner changes:
- using SCANNER.TXT for frequencies, ranges also supported. file
format is the same as any other frequency file, thus can be edited
via the Frequency Manager.
- add nfm bw selector & time-to-wait to the UI
- add SCANNER.TXT to sdcard dir

orignal idea & scanner file adopted from user 'bicurico'

* small changes to scanner

* remember last category on frequency manager

* fix: cast int16_t instead of uint16_t (although i doubt we will
have more than 32767 buttons in the array...)

* added a missing last_category_id on freq manager
2019-10-29 22:53:54 +01:00
furrtek
30db22828c Fileman empty directory bugfix
Ajouté trames + config collier LGE
2019-05-23 05:20:01 +01:00
Tyler Roussos
9f587e6085 Fix Issue 88, Wrong Longitude in ADSB RX (#242) 2019-05-21 16:44:14 +01:00
mjwaxios
aa77657092 Fixed AIS RX negative Lat/Long (#241) 2019-05-07 01:59:49 +02:00
mjwaxios
9ecf765344 Fixed negative lat and log deg, min, sec to decimal deg. (#240) 2019-05-05 17:48:12 +02:00
furrtek
b1e72c788b Added RFM69 helper
LGE tool: new frames
Text entry string length bugfix
2019-05-05 00:43:36 +01:00
furrtek
dd35bda197 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2019-05-03 17:14:32 +01:00
furrtek
1534b92397 Updated CMakeLists.txt 2019-05-03 17:14:10 +01:00
Jared Boone
5ec8164e07 Sync up recent portapack-hackrf changes. (#229)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Setup: Format clock reference frequency in MHz, not Hz.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.

* Pin config: VREGMODE=1, add other pins for completeness, comment detail

* Pin setup: More useful comments.

* Pin setup: Change some defaults, only set up PortaPack pins if detected.

* Pin setup: Disable LPC pull-ups on PP CPLD data bus, as CPLD is pulling up.

* Baseband: Allow larger HackRF firmware image.

* HackRF: Remove USER_INTERFACE CMake variable.

* CPLD: Make use of HackRF CPLD tool to generate code.
2019-03-12 05:24:18 +00:00
clem-42
7f39e49404 Unable to build due to a missing LGE app declaration in CMakeLists (#220) 2019-02-06 19:24:34 +00:00
furrtek
162cb4c9fa Added LGE app, nothing to see here
Update button in signal gen now works for shape change
2019-02-06 17:34:53 +00:00
Jared Boone
e7c0fa394b PortaPack Sync, take 2 (#215)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.
2019-02-03 18:25:11 +00:00
Joakim Karlsson
262c030224 Map view in AIS (#213)
* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map
2019-01-14 23:38:12 +00:00
Maescool
920b98f7c9 Upstream merge to make new revision of PortaPack work (#206)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Fix merge conflicts
2019-01-11 06:56:21 +00:00
furrtek
bbb5dc3c12 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2018-12-18 16:25:43 +00:00
furrtek
1d13389b5a Bias-T now works in capture mode
Simplified soundboard app, still some work to do
Merge remote-tracking branch 'upstream/master'
2018-12-18 16:25:21 +00:00
Jared Boone
8feb79c710 Constrain enum type to address warning about underlying type conversion. 2018-08-05 15:17:48 -07:00
Jared Boone
f08e80e156 Application: Fix uninitalized fmt_pcm_t field warning 2018-08-05 15:07:12 -07:00
Jared Boone
17e5f6a1d7 ChibiOS/CMSIS: Patch to address C++1z warnings about "register" keyword. 2018-08-05 15:00:45 -07:00
Jared Boone
01bad2805c Merge branch 'external_clock' 2018-08-05 14:12:12 -07:00
Jared Boone
5fc1bde6bd CMake: Switch to C++17, because it's 2018, and I'm a modern man. 2018-08-05 14:11:08 -07:00
Jared Boone
88afee26d7 Clock Manager: Detect Si5351 CLKIN present, measure frequency, and use if approximately 10MHz. 2018-08-05 14:06:57 -07:00
Jared Boone
30f2bc4149 Clock Manager: Add API to measure LPC43xx clock inputs against IRC oscillator. 2018-08-05 14:06:45 -07:00
Furrtek
d7ee7f97a4 Ext clock detect bugfix attempt 2018-06-15 03:16:24 +01:00
furrtek
a82dc19639 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2018-06-12 07:55:30 +01:00
furrtek
609235b19f Testing external clock detection and auto-switch
Simplified audio spectrum computation and transfer
ACARS RX in debug mode
Disabled ABI warnings
Updated binary
2018-06-12 07:55:12 +01:00
furrtek
dc5d6fef70 Started work on ACARS RX
Added ACARS frequencies file
Moved non-implemented apps menu items down
2018-06-10 10:15:43 +01:00
dhoetger
e978848c3a #183 disables PIL decompression bomb protection to allow large ADSB map to be sliced (#184) 2018-06-04 00:13:43 +01:00
furrtek
5c1ba9b90d Added cursor to audio spectrum view 2018-05-22 04:43:04 +01:00
furrtek
63c4a60cf7 Fixed scrolling/FFT view glitch when going back to analog audio rx 2018-05-21 20:56:04 +01:00
furrtek
0222b60b30 Updated freqman files and max entries per file 2018-05-21 19:10:39 +01:00
furrtek
b813b32593 Added an audio FFT view in Wideband FM receive
Tried speeding up fill_rectangle for clearing the waveform widget
2018-05-21 18:46:48 +01:00
furrtek
b11c3c94b6 Added tone key mix ratio in Settings -> Audio
Renamed Setup to Settings
Updated binary
2018-05-16 09:45:13 +01:00
furrtek
b29c1d9749 Finally found what was eating all the RAM :D
Re-enabled the tone key selector in Soundboard
Soundboard now uses OutputStream, like Replay
Constexpr'd a bunch of consts which were going to BSS section
Exiting an app now goes back to main menu
Cleaned up Message array
2018-05-15 23:35:30 +01:00
NotPike
2d3a6313cc Touchtunes Update (#173)
* Update ui_touchtunes.hpp

* Update ui_touchtunes.cpp
2018-04-25 07:19:35 +01:00
furrtek
3ddc6553ac Beta scanner app
ADSB TX frame index bugfix (OOB)
2018-04-19 20:50:32 +01:00
furrtek
5636764226 Added channel centering cursor in waterfall view
Added more samplerate choices in capture
Updated binary
2018-04-18 22:44:41 +01:00
furrtek
d0ce9610b5 Added some skeletons
Renamed "Scanner" to "Search"
Modified splash bitmap
Disabled Nuoptix TX
2018-03-27 12:52:07 +01:00
furrtek
8573f760be Added basic APRS transmit
Added goertzel algo
Updated binary
2018-02-23 20:21:24 +00:00
furrtek
7fd987a2b4 Added support for multiple sample rates in IQ record
Support for any sample rate <= 500k in IQ replay
Fixed bias-t power not activating in TX
Removed RSSI pitch output option (awful code)
Udated binary
2018-02-22 07:04:19 +00:00
RndmNmbr
36e5682406
Update ui_widget.hpp
Added include of <functional> to allow for a clean build with g++ 7.2.1 20170904
2018-02-03 13:41:40 -05:00
furrtek
57c759627d Fixed mic tx not working the first time it was entered
Fixed SD card FAT wipe (buffer size too big)
Cleared some warnings from ADSB rx
Updated binary
2018-02-01 11:17:51 +00:00
furrtek
441a266dc4 Added back scanning in BHT TX
Added file creation date display in File Manager
2018-01-09 21:12:19 +00:00
furrtek
aebd1757da Replay app loads original record frequency if available
Updated binary
2018-01-08 05:32:49 +00:00
furrtek
d6afd84c66 File load path bugfix 2018-01-08 04:27:16 +00:00
furrtek
f0c912be2e Added Bias-T toggle confirmation
Backlight setting save bugfix
Updated binary
2018-01-08 03:47:37 +00:00
furrtek
3193c6ee99 Added bias-T status icon
Merged radio settings in one screen
2018-01-07 23:13:08 +00:00
furrtek
c9381f1418 Added loop option in Replay app
Updated binary
2017-12-11 04:14:54 +00:00
furrtek
70c7646743 Capped max entries per Freqman file to 30 due to RAM issue
Capped max files in Soundboard to 54 and removed CTCSS options due to
same issue
Splitted files for jammer ranges
Bugfix: Mismatch between filename and category name in Freqman
Bugfix: Freqman file parsing strstr()'s might have gone out of buffer
Updated binary
2017-12-11 02:40:43 +00:00
furrtek
2d01822cdb MenuView bugfix (again)
Updated binary
2017-12-10 03:34:11 +00:00
furrtek
65a99bbe5a Added RF amp setting in ADS-B RX
Removed frequency step, added LNA setting in Replay
Another menu bugfix :(
Updated binary
2017-12-08 21:46:16 +00:00
furrtek
3d2dacaf29 Added range file and range type to frequency manager (mainly for jammer)
Made MenuView use less widgets, hopefully preventing crashes with large
lists
Fixed M10 sonde crash on packet receive
Updated about screen
Updated binary
2017-12-08 18:58:46 +00:00
furrtek
b38adf3769 Replay of IQ files ! :D
Added icons and colors for commonly used files in Fileman
Fileman can filter by file extension
Bugfix: Fileman doesn't crash anymore on renaming long file names
Updated binary
2017-12-07 00:58:25 +00:00
furrtek
3221992ad1 Added back frequency display for CTCSS
Attempted to fix replay, just fixed StreamBuffer read() and added
waterfall display...
Updated binary
2017-12-06 13:20:51 +00:00
furrtek
d77337dd77 Added CTCSS decoder in NFM RX
RSSI output is now pitch instead of PWM
Disabled RSSI output in WBFM mode
2017-11-28 08:52:04 +01:00
furrtek
f128b9b0b7 GCC array init bug workaround 2017-11-10 21:25:57 +01:00
furrtek
dc82f15ece Started adding decoders for RS41 radiosondes
Hopefully fixed M2K2 radiosonde battery voltage decoding
Updated binary
2017-11-10 02:20:44 +00:00
furrtek
1b93dd53e8 Tone generator class 2017-11-10 00:25:04 +00:00
furrtek
32ae059c44 Added workaround for the CPLD overlay issue in tx mode
Set back mic samplerate to 24kHz because 48kHz was poop :(
2017-11-09 22:25:37 +00:00
furrtek
4465cfb905 Added tone keys for some wireless mic brands
Renamed CTCSS stuff to Tone key
Changed PTT key in mic TX (was left, now right) to allow easier exit
Mic samplerate bumped to 48kHz
Updated binary
2017-11-09 20:02:34 +00:00
Mycroft
3b0346ca21 Add simple icao logging to adsb receiver app. (#120)
* Add simple icao logging to adsb receiver app.

* full frame logging and expanded details
2017-11-08 21:23:06 +01:00
furrtek
196518457f Fixed freeze in TouchTunes scan
Made adsb_map.py compatible with Python 3
2017-11-08 21:08:46 +01:00
furrtek
d517bc31ec Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-11-02 17:17:59 +00:00
furrtek
2ec24c9fa8 Fusion ! 2017-11-02 17:11:26 +00:00
furrtek
17b238f3a8 Added "test app" as a draft zone for... stuff
Added second signature for M2K2 radiosonde
2017-10-30 02:00:39 +01:00
furrtek
d5aec94eed Added unit parameter for geopos widget, updated binary 2017-10-28 20:22:55 +02:00
furrtek
d4207cde7b Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-10-28 19:29:09 +02:00
furrtek
a27b581e1a Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-10-28 19:28:26 +02:00
Furrtek
046d1c7c15 Updated ui_widget.cpp 2017-10-28 19:27:18 +02:00
furrtek
e88bbf1850 Updated main.cpp 2017-10-28 19:17:50 +02:00
furrtek
6ff8249a4f Added logging, serial number and battery voltage display to radiosonde RX
Added decimal degrees display to geopos widget
2017-10-28 19:16:06 +02:00
Furrtek
90b76f00d9 Added cursors in waveform widget
Auto unit string format function
2017-10-28 16:34:52 +02:00
furrtek
d47f292d3a Radiosonde RX now understands Meteomodem's M10 correctly
Updated binary
2017-10-27 18:54:50 +02:00
furrtek
6e7b2c751f Added wav file viewer
Fileman open now allows going into subdirectories
Updated binary
2017-10-15 15:53:40 +01:00
furrtek
40a71d32a2 Added keyfob UI and debug functions
Fixed hex display truncated to 32 bits instead of 64
Updated binary
2017-10-14 16:30:49 +01:00
furrtek
04c5b4d607 Stupid mistake with world_map.bin detection 2017-10-14 11:33:41 +01:00
furrtek
f00125879d Added a bunch of notes about Radiosonde RX (help !) 2017-10-06 05:35:25 +01:00
furrtek
d3222c27ca Started working on radiosonde RX
Removed some warnings
Better handling of absent map file in GeoMap ?
2017-10-05 05:38:45 +01:00
furrtek
34b99042ef Changed freqman file loading to be a bit less stupid
Capped freqman file entries to 50 due to RAM overflow (?)
2017-10-05 03:42:46 +01:00
furrtek
73d47cd77d Added remaining buttons for TouchTunes remote
LCR transmit UI cleanup
CC1101 data whitening function
Uniformized tx progress message handling
2017-09-24 20:05:42 +01:00
furrtek
26949773bb Added TouchTunes remote 2017-09-23 12:02:32 +01:00
furrtek
9acfdcbd41 Added function setting in POCSAG TX
POCSAG TX: Max message length is now 30 (was 16 for no reason)
2017-09-23 04:53:42 +01:00
furrtek
a6d2b766f4 Fixed EPAR transmit 2017-09-21 09:18:17 +01:00
furrtek
c0f51c2690 Date and time display widget
Disabled handwriting text input (not that useful for now)
Bugfix: Trim long filenames in fileman
Slight cleanup of 7-seg display widget
2017-09-20 07:50:59 +01:00
furrtek
37ce81383d Added file manager 2017-09-19 20:14:56 +01:00
furrtek
8e560ef68a AFSK log fixed 2017-09-02 10:51:57 +01:00
furrtek
950bc2b1d2 AFSK RX works (only Bell202 for now)
AFSK RX always logs to file
Removed frequency and bw settings from modem setup view
Updated binary
Bugfix: Binary display shifted one bit
Bugfix: Frequency manager views freezing if SD card not present
Bugfix: Menuview blinking arrow not showing up at the right position
Bugfix: Freeze if console written to while it's hidden
Broken: LCR TX, needs UI update
2017-09-02 08:28:29 +01:00
furrtek
42439d1885 Started writing (copying...) AFSK RX
Encoders: removed bit duration setting (frame duration is more useful)
2017-08-29 09:42:04 +01:00
furrtek
cd6a1a7f3f Added tabs in OOK encoders app
Simplified credits scrolling
2017-08-28 22:17:02 +01:00
furrtek
6fcb2efdcf Updated binary 2017-08-28 07:06:04 +01:00
furrtek
986b54e43f Added ADSB RX details view
ADSB RX: Details and map view shouldn't freeze anymore
Added instructions to generate world_map.bin
2017-08-28 07:05:31 +01:00
furrtek
fa519bba63 Added map view for ADSB RX
Geomap: added tag display (text)
Geomap: fixed Y scroll value
Fixed frequency display not updating after edit
Updated binary
2017-08-27 22:06:11 +01:00
furrtek
3aae333974 ADSB RX text color bugfix
ADSB RX entries now "age" after 10 and 20 seconds
2017-08-27 21:03:17 +01:00
furrtek
2628f9c03d ADSB position decoding
Date and time string format function
Binary update
2017-08-17 12:56:47 +01:00
furrtek
9d902bc224 ADSB RX now works \o/
Added tabs in RDS TX, multiple groups can be sent at once
Bugfix: text not updating on UI after text prompt
2017-08-16 10:02:57 +01:00
furrtek
160359166a Added tabs to RDS tx app
Fixed callsign not updating in ADSB tx
2017-08-16 07:46:28 +01:00
furrtek
728bb64543 BW setting in TX view should now be used everywhere
Jammer center and width value editing bugfix
2017-08-12 19:28:57 +01:00
furrtek
81eb96f870 Updated firmware binary 2017-08-12 17:51:52 +01:00
furrtek
96880d2fc6 Added "artist" and "title" (=frequency) info chunks to WAV files 2017-08-12 14:29:54 +01:00
furrtek
7f97a090e4 Fixed ADSB TX frame rotation 2017-08-12 09:54:58 +01:00
furrtek
cb880258fb GeoMap and Jammer clean up
Jammer ranges can now be set with center and width
GeoMap can be moved with touch
GeoMap negative coordinates bugfix
Replay app throws error if no files found instead of crashing
2017-08-12 07:07:21 +01:00
furrtek
e5fef6bb89 Added tabs to BHT TX and Jammer
Updated firmware binary
2017-08-12 00:27:05 +01:00
Jared Boone
f726a54f25 Fix whitespace to match furrtek/portapack-havoc. 2017-08-09 17:08:30 -07:00
Jared Boone
b147aee30a Fix typos committed to furrtek/havoc repo.
Thanks, furrtek!
2017-08-09 16:40:08 -07:00
Jared Boone
39617f38bf TPMS: Remove unused variable.
May use again, so commented out.
2017-08-08 10:36:17 -07:00
Jared Boone
2033967dc6 RegistersWidget: Fix type warnings. 2017-08-08 10:33:55 -07:00
Jared Boone
74ecff13ad GCC: Fixed __SIMD32 type punning warnings.
With help from https://github.com/ARM-software/CMSIS_5/issues/98

Using void* makes me really queasy though!
2017-08-08 10:24:49 -07:00
Jared Boone
22fc6756c6 Audio: Init codec after initializing I2S interface. 2017-08-06 14:51:10 -07:00
Jared Boone
fe7cc1e23f Audio: Add I2S mode for TX external SCK/WS. 2017-08-06 14:23:19 -07:00
Jared Boone
58e0432b56 I2S: Enable input buffer on SCK for LPC43xx slave mode. 2017-08-06 12:44:27 -07:00
Jared Boone
ac423ee769 Audio: Add codec config methods for external I2S master. 2017-08-06 12:43:39 -07:00
Jared Boone
6c3a1384fb WM8731: Extract interface configuration method. 2017-08-06 12:08:12 -07:00
Jared Boone
f0947a4917 AK4951: Separate/rename codec interface mode config methods. 2017-08-06 12:02:38 -07:00
Jared Boone
f0fb4cb369 I2S: Change RXMODE[1:0] to idle bit rate divider.
No change in function, but *may* result in tiny reduction in power and noise? Not tested.
2017-08-06 11:20:51 -07:00
Jared Boone
e59e983e29 I2S: Rename configuration structs to reflect interface modes. 2017-08-06 11:17:38 -07:00
Jared Boone
49252dc1bc LPC43xx: Add CREG6 struct definition. Add I2S CREG6 configuration. 2017-08-06 11:16:57 -07:00
Jared Boone
80d96b08cf CPLD: Temporarily remove HackRF bitstream check UI.
It was poorly implemented and was confusing the hell out of people when their CPLD was showing "BAD", even though it was fine...
2017-08-05 12:02:14 -07:00
furrtek
fba5b507ad Made a GeoPos widget for lon/lat/alt entry and display (APRS...)
Cleaned up the GeoMap view, can be used as input
2017-08-03 19:06:59 +01:00
furrtek
a5f0f72ea1 Split ADSB TX into tabs
Simplified TabView a lot
2017-07-30 14:46:42 +01:00
furrtek
89a3afcd74 Started writing TabView
Loopable NumberField
2017-07-30 09:39:01 +01:00
furrtek
215ac43126 Fix std::array init 2017-07-30 00:07:57 +01:00
Jared Boone
2de30b9920 Audio: use ADC right channel for microphone.
AK4951 produces mic data only in right channel. WM8731 places mic samples on both channels.
2017-07-26 17:38:34 -07:00
furrtek
0cbf9cd386 Added velocity/bearing ADS-B frame for tx
Added compass widget
Manchester encoder
2017-07-25 08:30:12 +01:00
furrtek
c2a9ed7d9b Merge remote-tracking branch 'upstream/master' 2017-07-25 00:20:57 +01:00
furrtek
c2fc060306 Moved screenshots 2017-07-25 00:20:37 +01:00
furrtek
5a67a7080a ADS-B TX works well enough for dump1090 and gr-air-modes
Hooked ADS-B RX to baseband instead of debug IQ file, not tested
2017-07-23 12:20:32 +01:00
furrtek
b57b41753f Added map display view (GeoMapView)
SigGen duration bugfix
2017-07-22 19:30:20 +01:00
Jared Boone
e9895c1b11 IO: Enable input buffer on LCD_WRX.
Just for consistency. Other LCD interface pin states are read during interrupt.
2017-07-20 16:37:48 -07:00
Jared Boone
751ae92509 CPLD: Switch sense of LCD_RD/WR pins.
Should keep CPLD settled when in HackRF mode.
2017-07-20 16:33:55 -07:00
furrtek
3005403b5e Added De Bruijn sequence generator
Moved POCSAG frequency list to SD card file for FreqMan
2017-07-20 16:48:59 +01:00
Laurent F4GEV
9cb00fff6c Update pocsag_app.hpp
Add french poscag new frequency, specially for fire department and private networks
2017-07-19 08:45:17 +02:00
Jared Boone
ddd951f2d8 Power: Restore peripheral clocks when starting HackRF firmware.
HackRF firmware assumes state specified in user manual, where all(?) peripheral clocks are enabled.
2017-07-18 21:47:04 -07:00
Jared Boone
aa189a3462 Backlight: Add abstraction for support of different hardware. 2017-07-18 21:29:32 -07:00
Jared Boone
e695d496c5 portapack.hpp: Add missing #pragma once 2017-07-18 21:04:29 -07:00
Jared Boone
c74dcbb9ba Power: Turn off unused peripheral clocks.
Dropped power consumption by 42mA at VBUS -- ~200mW.
2017-07-18 17:04:04 -07:00
Jared Boone
c5230387df OS: Disable drivers for unused peripherals. 2017-07-18 15:50:00 -07:00
Jared Boone
1eb561ab45 LCD: Rename lcd_write_data_fast to lcd_write_data.
It's the only LCD write function!
2017-07-18 13:27:15 -07:00
Jared Boone
aa66c0b7f7 LCD: Consolidate read functions.
Faster function consumed by slower function, because faster function was failing during testing.
2017-07-18 13:23:16 -07:00
Jared Boone
2064689d46 IO: Remove out-of-date comment. 2017-07-18 13:17:10 -07:00
Jared Boone
030a0bcb0c IO: Add LCD write function for C arrays. 2017-07-18 13:16:41 -07:00
Jared Boone
bb194825ae ILI9341: Refactor sleep on/off, display on/off functions. 2017-07-18 13:13:13 -07:00
furrtek
58f113d153 "CW generator" and "Whistle" merged in "Signal generator"
Added wave shape selection and tone frequency auto-update
Converted color icons to B&W
2017-07-18 19:31:05 +01:00
Jared Boone
23c340abb2 MAX V: Add shift_dr() for testing. 2017-07-18 10:53:43 -07:00
Jared Boone
963579d82a AK4951: Adjust initial microphone gain. 2017-07-18 10:53:08 -07:00
Jared Boone
0bdf8b47ea CPLD: Remove "default" HackRF bitstream. 2017-07-18 10:46:26 -07:00
Jared Boone
2356b585d5 FatFs: Fix Makefiles to include unicode.c. 2017-07-18 10:37:29 -07:00
furrtek
93c5959df6 ADS-B frame struct, callsign decode 2017-07-18 01:07:46 +01:00
Jared Boone
62b1a82b6b Doc: Fix incorrect comment about MCU->CPLD pin functions. 2017-07-17 16:41:02 -07:00
Jared Boone
1b9a569022 SDC: Adjust clock/data timing and output drive to match SD specs, measurements. 2017-07-17 16:38:31 -07:00
furrtek
32e8bc4c65 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-07-14 10:02:38 +01:00
furrtek
802b91964b ADS-B receive app debug code 2017-07-14 10:02:21 +01:00
Furrtek
6a148c135a Updated binary 2017-06-29 23:54:13 +02:00
furrtek
46515ebb05 Replay buffer size and samplerate adjustment 2017-06-24 18:42:41 +01:00
furrtek
33a2df9d2a OutputStream (file M0 -> M4 radio) now works
Disabled numbers station for now (too buggy, low priority)
2017-06-23 08:40:22 +01:00
furrtek
c922a56b6d High frequency load/save bugfix
Editing widgets hidden if freqman category is empty
Textentry now trims strings up to cursor
2017-06-23 00:13:13 +01:00
furrtek
08391bba4f Support for frequency manager categories (as files)
Base class for frequency manager views
Menuview clear/add bugfix
2017-06-22 09:08:37 +01:00
furrtek
abd154b3c7 Merge remote-tracking branch 'upstream/master'
Base class for text entry
2017-06-21 03:25:27 +01:00
Jared Boone
bf7f5d2567 IRQ: Make handlers more independent of EventDispatcher.
EventDispatcher is such a hairball...
2017-06-19 16:31:54 -07:00
Jared Boone
47cc88d1e1 ILI9341: Tidy scroll types, use height(). 2017-06-19 16:31:54 -07:00
Jared Boone
748e5a4f5f Init: Boot to HackRF mode if PortaPack CPLD not found.
Worst case, customers can always pull off the PortaPack to get back to a working HackRF.
2017-06-13 22:16:00 -07:00
furrtek
61be221432 Frequency manager lists
Scanner approximately 6.3% less buggy with wide ranges
2017-06-12 03:55:36 +01:00
furrtek
e2f0a03460 Using new CPLD data (fixes spectrum mirroring)
Scanner bugfix for wide ranges
Added squelch parameter for NFM receiver
Adjustment to Vumeter widget rendering
2017-06-11 09:50:29 +01:00
furrtek
042d271a9f Text entry should be more stable
Text entry now allows for strings greater than 28 chars
Frequency manager save with name bugfix
2017-06-11 02:53:06 +01:00
Jared Boone
e85fb47a49 Extract function that returns audio codec based on hardware revision. 2017-06-02 22:24:15 -07:00
Jared Boone
dec4e41189 CPLD: Organize CPLD code into namespaces.
Use type aliases to hide actual CPLD type (somewhat).
2017-06-02 21:57:13 -07:00
Jared Boone
dd0c009e6f CPLD: Stop generating HackRF CPLD .hpp file. 2017-06-02 21:55:35 -07:00
Jared Boone
3d06941129 Move CPLD filres to common/
...for imminent refactoring.
2017-06-02 17:13:41 -07:00
Jared Boone
fe687b93a2 CPLD: Extract decision about which CPLD config to use.
...based on hardware revision.
2017-06-02 17:05:41 -07:00
Jared Boone
a3483a8394 CPLD: Introduce Config type to clean up programming interface.
Hide the details of how the CPLD data is stored.
2017-06-02 16:54:24 -07:00
Jared Boone
797e63a590 CPLD: Use correct bitstream for updating hardware.
Determine hardware version and use one of two CPLD bitstream files.
2017-05-31 22:28:07 -07:00
Jared Boone
0fd52a7483 CPLD: Move HDL project to hardware revision-specific directory. 2017-05-31 11:50:59 -07:00
Jared Boone
4332bc763e Audio: Use correct codec based on hardware revision. 2017-05-31 11:48:03 -07:00
Jared Boone
6e5549f127 Add hardware revision detection function. 2017-05-31 11:47:13 -07:00
Jared Boone
600dcb734e AK4951: Initial commit. 2017-05-31 11:45:54 -07:00
Jared Boone
395e3b1736 Audio: Add input namespace and functions. 2017-05-31 11:43:45 -07:00
Jared Boone
bec626e29f WM8731: Add Codec abstraction. 2017-05-31 11:42:12 -07:00
Jared Boone
37c058354e WM8731: Add method to detect codec is present.
Used to determine PortaPack hardware version.
2017-05-31 11:34:16 -07:00
Jared Boone
8f5555b052 WM8731: Store headphone volume for mute() function.
So when unmuted, previous volume can be restored.
2017-05-31 11:32:32 -07:00
Jared Boone
f6e1e78e8a WM8731: Return bool from reset() and low-level write()s. 2017-05-31 11:28:00 -07:00
Jared Boone
da4bee6cc6 Audio: Introduce Codec abstraction.
Now that we have two hardware variants with different audio codecs.
2017-05-31 11:21:51 -07:00
Jared Boone
5da64ab069 Modify registers widget to simplify configuration.
Now specify number of registers and register bits, and the widget figures out the rest.
2017-05-31 11:12:56 -07:00
Jared Boone
b3ee884f16 I2S RX: Set RX SDA pin to correct SCUMUX mode.
It's left in GPIO mode ordinarily, because of CPLD programming earlier in boot-up.
2017-05-26 16:50:34 -07:00
Jared Boone
5cb71d787e Audio DMA: Fix cut-and-paste error
rx_empy_buffer() was returning the peripheral address, not the buffer address.
2017-05-26 16:21:28 -07:00
furrtek
b3aa4bf0b9 Reorganized menus 2017-05-25 21:36:30 +01:00
furrtek
5a11377429 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-05-25 21:08:50 +01:00
furrtek
8e99bccd41 Started work on APRS (AX25) 2017-05-25 21:08:33 +01:00
Jared Boone
6ef8b19bf1 Move some GPDMA configuration to application processor. 2017-05-24 15:42:44 -07:00
Jared Boone
556085b3e3 I2S: Enable TX_WS output pin's input buffer.
This permits receipt of TX_WS as RX_WS for the receive side of the I2S peripheral, and was why I got no RX samples when testing microphone input.
2017-05-22 14:20:49 -07:00
Matt "Mookie" Thayer
36db5d63e1 Update pocsag_app.hpp 2017-05-18 23:12:00 +02:00
furrtek
a35d9ee8a9 Missing image files 2017-05-18 21:56:55 +01:00
Matt "Mookie" Thayer
35b1654128 Minor change to named preset.
Shortened NL KPN because it was too long and breaking the display.
2017-05-18 22:47:43 +02:00
furrtek
82cb56e9b2 Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-05-18 11:06:18 +01:00