750 Commits

Author SHA1 Message Date
heurist1
567fee1d98 Create optimised integer functions to reduce CPU usage
(cherry picked from commit a47bfe1da7bffe9f752e4c522e11593cce6dffd0)
2023-02-28 20:00:39 +00:00
heurist1
b549d3a4f1 Add ability to draw text with a transparent background
(cherry picked from commit a15da2e136147b31ab53058871815c8eb759576a)
2023-02-28 20:00:05 +00:00
phil-stumpy
66ba6442b1 Adding support for HackRF One R9, as per https://github.com/sharebrained/portapack-hackrf/pull/187 2023-02-16 12:10:26 +00:00
Brumi-2021
6e5bb7911c Added Vertical rate field ADSB-TX 2023-01-05 00:14:11 +01:00
Brumi-2021
2902365b80 Solving correct Bearing Angle in ADSB TX app 2023-01-01 23:23:06 +01:00
Brumi-2021
64ca9f6a68 Minor sin_f32_table correction and comments 2022-12-29 23:27:15 +01:00
rusty.labs
e69c9bbc7b #755 fix, sin_f32 fails at 180
#755 fix, sin_f32 returns incorrect result at 180 degrees, clean up
2022-12-28 01:13:42 -05:00
lujji
0631f5d5ab implement ook scan 2022-12-05 16:51:23 +02:00
Brumi-2021
1e4c93b979 Final opt. AM-9K, applied to Audio_RX and Mic App. 2022-11-19 18:17:54 +01:00
Brumi-2021
25dfa96257 Adding FIR_taps for EU AM broadcasting 9K00A3E 2022-11-14 00:32:29 +01:00
GullCode
e76faf6edd
Merge pull request #717 from Brumi-2021/Recovered_ALC_AK4953_Mic_App_feature_solving_WM8731_side_effects
Adding Mic Control gain in both platforms : mic Auto volume Level Control  (AK4951) and mic Boost control (WM8731)
2022-10-09 21:50:43 +02:00
GullCode
1d521819ff
Merge pull request #711 from GullCode/recon-app
Recon app
2022-10-08 13:46:50 +02:00
GullCode
83f7c9ae63
Merge pull request #707 from Brumi-2021/try_to_solve_RX_ghost_signal_issue_#637
Solve previous regression fw 1.3.1 -->fw 1.4.0 onwards , about RX ghost signal issue #637
2022-10-07 22:17:10 +02:00
Brumi-2021
6b75249b0a Finalised all Mic Boost(WM) and Mic ALC(AK) 2022-10-02 00:51:12 +02:00
Brumi-2021
745574d3c4 Ak4951-ALC_base adding WM8731-boost OFF options 2022-09-28 22:42:33 +02:00
GullCode
9086f32a63 Added Recon app persistent settings 2022-09-13 23:58:03 +02:00
GullCode
cf40f5eb14 Added ButtonWithEncoder 2022-09-13 23:58:03 +02:00
Brumi-2021
08a108d3e4 First test, ghost-singal c/m to only Mic_App 2022-08-26 18:34:30 +02:00
Jared Boone
e5a30b4309
Persistent memory check value verification, defaulting when fails. (#662)
* Make default constructor for touch calibration

* Add persistent memory check value and access abstraction.

* Add persistent data_t default constructor with reasonable defaults.

* serial_format_t default constructor.

* Tidy up backlight timeout type.

* Add persistent data struct version/checking.

* Make range_t functions constexpr.

* Move ui_config and functions into class.

* Add backlight_config_t struct, separate enable and time settings.
2022-05-29 08:55:18 +12:00
Brumi-2021
379ad6dbf0 Recovered_ALC_Mic_Feature_AK4953_OK_WM8731 2022-05-28 22:29:10 +02:00
Brumi-2021
1027e80d53
Recovered lost ctcss/roger beep/correct mic gain in mic app from 1.5.1 without ALC (Auto mic Limit Control-AK) (#633)
* Update spectrum_collector.cpp

lower case correction

* Update spectrum_collector.cpp

Description changed , better explanation.

* Revert "Update spectrum_collector.cpp"

This reverts commit 4a6fc35384dd3007a4cc91c319b68d2b17232a8c.

* Revert "Update spectrum_collector.cpp"

This reverts commit 35cece1cb0b611aec2dcee474168798883da2819.

* Revert "Solving Compile error on gcc10 . Keeping same safety protection about the size of the array ,but with slightly different sintax."

This reverts commit f4db4e2b535cd722ce0f5ee6cd8094d4ba717c4f.

* Recovered CTCSS-Roger_beep-MIC-GAIN from 1.5.1

* Temporary removing ALC-( for AK4951 platorm)
2022-05-07 11:43:14 +12:00
GullCode
5551c6a676 Fixing branch, moving block, adding quote 2022-05-04 10:29:12 +02:00
GullCode
0580a528e4
Merge branch 'next' into touch_return_option 2022-05-03 14:31:03 +02:00
GullCode
c75c4685cd Added a ui_config flag to manage gui return icon status 2022-05-03 14:23:58 +02:00
Arjan Onwezen
799a473b36 Save individual app settings. Currently only for apps in Receive section and basic settings like, LNA, VGA, Rx Amp and Frequency. 2022-05-01 06:09:02 -04:00
Erwin Ried
a5a9bc85f8
Merge pull request #597 from GullCode/proc-aprsrx-warning-fix
Fix for proc_aprsrx and aprs_packet warnings, they are related
2022-04-22 09:59:31 +02:00
GullCode
f804d7997c Fix for warning: narrowing conversion 2022-04-21 21:41:02 +02:00
GullCode
2108ea53fa Fix for proc_aprsrx and aprs_packet warnings, they are related 2022-04-21 17:38:49 +02:00
Erwin Ried
cdba4fa5bf
Merge pull request #590 from GullCode/a-packet-warning-fix
Fixed warning: comparison of integer expressions of different signedness
2022-04-18 23:29:41 +02:00
GullCode
4b87a8a7dd Fixed warning: comparison of integer expressions of different signedness 2022-04-18 22:38:29 +02:00
ArjanOnwezen
a9d2b2ff8a
Merge branch 'next' into feature/disableTouch 2022-04-08 16:10:55 +02:00
Arjan Onwezen
6697d2533c Added support for LARGE qr code. 2022-04-08 08:38:32 -04:00
jLynx
51bc0f0100 Fixed broken radio offset 2022-04-07 21:22:47 +12:00
jLynx
0c0d47b0d2 Added persistent memory of save state 2022-04-06 13:28:10 +12:00
jLynx
fd8bc177ad Added support for H2+ 2022-04-05 14:41:12 +12:00
Erwin Ried
477e6d65df
Merge pull request #488 from ArjanOnwezen/improve-screen-navigation
Improvements to screen navigation
2022-03-28 10:10:46 +02:00
Erwin Ried
a55e5d4fc0
Merge pull request #497 from Brumi-2021/Solving_mic_saturation_and_spectrum_armonics_Mic_App
Solving_mic_saturation_and_spectrum_harmonics_Mic_App
2022-03-28 10:10:08 +02:00
Arjan Onwezen
d9c1b6b61f Added consecutive id's in message.hpp, as mentioned in #484. 2022-03-20 13:38:53 -04:00
Brumi-2021
d5a1733c1c Solving_mic_saturation_and_spectrum_armonics_Mic_App 2022-03-05 21:39:53 +01:00
Arjan Onwezen
ec23dd8edf some improvements to screen navigation 2022-01-30 05:12:46 -05:00
Žiga Deisinger
cebbc12084 Enable / Disable Touchscreen #481
This commit will reverse the logic of touch screen as suggested by @ArjanOnwezen
2022-01-27 14:23:22 +01:00
Žiga Deisinger
4a0d42ed34 Add code for feature "Disable Touch" 2022-01-26 21:52:08 +01:00
Žiga Deisinger
96879d3664 Add code for feature "Disable Touch" 2022-01-26 14:53:31 +01:00
Erwin Ried
2a11b59ab7
Merge pull request #424 from intoxsick/custom-splash-screen-from-sd
Custom splash screen from sd
2021-11-24 12:35:41 +01:00
Erwin Ried
0d1d703ba9
Merge pull request #426 from heurist1/update_pocsag_decoder
Update pocsag decoder
2021-11-24 12:32:33 +01:00
Erwin Ried
e985efd78b
Merge pull request #422 from heurist1/adsb-improve-decode-and-gui
Adsb improve decode and gui
2021-11-22 20:53:29 +01:00
heurist1
a571e40c59 Changed amp to integer 2021-11-06 10:15:17 +00:00
heurist1
79b24ebe13 Improve output 2021-11-01 22:51:06 +00:00
heurist1
318720f364 Removed all traces of the parameters on the POGSAG config message
Left in the message for the moment, because there are likely to be parameters needed at some point.
2021-10-22 18:11:50 +01:00
heurist1
62f063aef5 Removed unused items from the UI
Removed unused items from the UI
2021-10-21 17:14:08 +01:00
heurist1
ab364ca497 POCSAG before reformat
This is the POCSAG code before reformat to put smooth and extract packets in the correct place
2021-10-10 09:15:42 +01:00
heurist1
a49c35088d Added back
Added the ability to use the Up and Left buttons simultaneously to cause the cursor to move to the top left of the screen
2021-10-09 22:46:05 +01:00
teixeluis
fe806b7bdc Fixed the mixing of aircraft coordinates in the details view, by
checking if the ICAO address of the frame and the current item
in the details view match. Slight refactor by placing the decimal
to string conversion function into the string_format module.

Added fix in the scope of issue #365

FrequencyStepView field in TransmitterView class

FrequencyStepView field in TransmitterView class

Update ui_transmitter.hpp

Update credits

Fixed left padding of the decimal part of the numbers.
2021-06-24 15:16:19 +01:00
teixeluis
97349b06ef Fixes to the log and screen rendering of the geo coordinates. 2021-06-23 19:54:34 +01:00
teixeluis
2ceb49e4f2 Added more precise function to calculate NL (based on cmath lib).
Created constants for some of the values scattered in the code.
2021-06-19 23:41:06 +01:00
teixeluis
43e123bafe Used temporarily for experimental purposes, no longer needed. 2021-06-11 00:25:24 +01:00
teixeluis
c2dc7d1cf5 Slight improvement of the tone generator. 2021-06-11 00:13:56 +01:00
teixeluis
edcd780402 Improved the pitch RSSI. Still looking for better approach. 2021-06-10 12:10:24 +01:00
Arjan Onwezen
6bc2cbeda9 ISO datetime for Clock, FileManager, Frequency manager
Added option to show/hide clock (with/without date)
2021-05-17 23:16:15 +02:00
Arjan Onwezen
f5c3219035 aprs_packet.hpp compiler warning fix 2021-05-10 21:30:45 +02:00
eried
57ed3ebb43 Merge branch 'pr/325' into next 2021-04-14 09:30:53 +02:00
DESKTOP-R56EVJP\Alex
f65852ff05 Rebased code from new eried repo commits. Changed to to reflect strijar implementation. Fixed previous issue with old ssb-am-tx ui_mictx code. 2021-03-21 20:21:50 -05:00
Erwin Ried
fe98a58a4f
Merge pull request #277 from GullCode/adsb_warning_fix
Fix adsb warnings
2021-03-15 11:45:32 +01:00
Erwin Ried
ee2ebc8302
Merge pull request #272 from euquiq/RADIOSONDE_METEOMAN_LAT_LON_BUG_FIX
Fix bug on radiosonde Meteoman Lat & lon calculation
2021-03-15 11:44:21 +01:00
East2West
f15cf78101
Add APRS Receiving App 2021-03-11 22:27:19 -06:00
ImDroided
62c1e4e028 Added Pocsag bitrate
I added 3200 to the bitrates in pocsag per a user request on Facebook.
2021-02-14 12:52:56 -06:00
Erwin Ried
f0ca95ee7e
Merge pull request #274 from GullCode/sonde_packet_warning_fix
Moved calibytes and calfrchk to cpp file to avoid unused warning
2021-02-03 22:06:27 +01:00
Erwin Ried
77a7f48958
Merge pull request #284 from GullCode/proc_pocsag_warning_fix
Added missing initialisations
2021-01-28 00:23:10 +01:00
Erwin Ried
523877e0d1
Merge pull request #287 from GullCode/ais_packet_warning_fix
Added missing default constructor
2021-01-28 00:22:37 +01:00
GullCode
45b874694e Added missing default constructor 2021-01-27 16:36:44 +01:00
GullCode
ec520bf08c Added missing initialisations 2021-01-27 16:07:03 +01:00
GullCode
c3fe053eb2 Fix adsb warnings 2021-01-27 15:38:05 +01:00
GullCode
e75677d366 Moved calibytes and calfrchk to cpp file to avoid unused warning 2021-01-27 15:09:02 +01:00
GullCode
1c1d3e9897 missing contructor 2021-01-27 14:57:22 +01:00
euquiq
50bab791dd Fix bug on radiosonde Meteoman Lat & lon calculation
The underlying function used for calculating Latitude and Longitude -also used in other places inside the radiosonde app- was returning a positive value always.

But it needs to cope with negative values also (i.e. Lat and Lon)

Fixed by just changing the returning value into int32_t (even if the calculation is done in uint32_t, the actual sign is passed thru when returning the calculated value -those are the same 4 bytes, interpreted either as (before) unsigned or (now) signed)
2021-01-25 23:41:19 -03:00
Белоусов Олег
1e9406d091 Cleaned up a bit 2020-12-24 11:14:23 +03:00
Белоусов Олег
63f6a885d8 Implemented correct display of the filter indicator on the waterfall 2020-12-23 18:00:51 +03:00
euquiq
6aee1c9c30 just making Persistent Memory easier to read
Some internal code re-writing in order to simplify a bit, and hopefully making it easier to understand what's going on inside there.
2020-11-03 02:14:16 -03:00
dqs105
7ca322fed4 Added options for tuning CLKOUT freq.
- Now we have variable CLKOUT.
- CLKOUT can be set between 10kHz and 60MHz.
(The output signal will become mostly sine shape when reaching 50MHz.)
- Click on freq setting field to change tuning step.
2020-10-24 00:24:05 +08:00
dqs105
699504a703 Removed trailing spaces. 2020-10-14 20:35:51 +08:00
dqs105
48ccc1e988 Merge branch 'clkout_enable' of https://github.com/dqs105/portapack-mayhem into upstream 2020-10-14 20:15:36 +08:00
Erwin Ried
f3503e6844 Fix for the freezing when no on_touch_release function 2020-09-25 03:34:05 +02:00
Erwin Ried
99af859e13 Default null for on touch release and press
Fixes https://github.com/eried/portapack-mayhem/issues/194
2020-09-24 03:15:40 +02:00
dqs105
66a841e079 combine clkout_config => ui_config 2020-09-17 12:47:34 +08:00
dqs105
b15b781039 Added options for enabling CLKOUT.
- CLKOUT can be enabled in Radio settings and status bar.
- Fixed a typo(I believe) in ui_navigation.
2020-09-16 19:27:56 +08:00
Erwin Ried
3d9ce8a037 Merge branch 'pr/166' into Radiosonde-vaisala-add-temp-humidity-merge-conflicts-fix 2020-09-14 23:11:08 +02:00
Erwin Ried
95be75a8af
Merge pull request #172 from dqs105/new_splash
New custom splash.
2020-09-14 22:53:59 +02:00
Erwin Ried
3aaa4a0ba1
Merge pull request #161 from dqs105/mic_tx_rfgain
Added TX Gain control & code simplification
2020-09-14 22:50:35 +02:00
dqs105
5cbbf62c5f Removed drawRAW.
- BMP files can be loaded directly now, so it can be removed.
2020-08-29 10:53:26 +08:00
dqs105
80f074b82f Added BMP file support.
- Now can load splash.bmp!
2020-08-28 12:23:52 +08:00
dqs105
7116ca3f91 Fixed typo. 2020-08-28 00:27:52 +08:00
dqs105
78f2e417d6 Fixed RGB565 mode & clean up 2020-08-28 00:21:09 +08:00
dqs105
8edaa1e51e Added new custom splash.
- Custom splash now can be loaded from SD card.
2020-08-27 23:07:48 +08:00
Erwin Ried
dbf8d2e130
Merge pull request #167 from euquiq/fix-backlight-timer-bug
fix-portapack-backlight-timer-bug
2020-08-25 10:11:31 +02:00
euquiq
a445bfa444 fix-portapack-backlight-timer-bug
The selected time for backlight off on Options-> Interface was not working ok for most of the selectable time options.
2020-08-24 18:12:46 -03:00
euquiq
13abb620f6 Radiosonde-vaisala-add-temp-humidity
Also added the fields "DateTime" which just shows the raw timestamp that portapack assigned the last packet received, in the format: YYYYMMDDHHMMSS ... And "Frame" which shows the packet # (or frame) for correlating with other software / verify that there are new packets being received.

Also moved a string function for returning rounded-up decimals, originally inside the whipcalc tool app, into the string_format functions library, because I used that function on TEMP and HUMIDITY values inisde the radiosonde app.

Finally, the whole UI has its widgets moved a bit, giving space for these new parameters.
2020-08-24 17:31:27 -03:00
dqs105
911eb36210 Merged TxButton and Button & minor bug fix 2020-08-24 11:02:42 +08:00
dqs105
d7568b820d UI tweak & new PTT button 2020-08-24 01:53:34 +08:00
Erwin Ried
f1a2155e87
Merge pull request #157 from eried/gcc9.3-assert-redefinition
Gcc9.3 assert redefinition
2020-08-20 21:45:11 +02:00
Erwin Ried
af8382eeb0
Merge pull request #145 from strijar/audio-cw
Audio FIR filter for CW
2020-08-20 20:57:01 +02:00
euquiq
e76a464f7e Radiosonde-CRC-checkbox
Added CRC calculation for Vaisala radiosondes.

Added a Checkbox on APP for turning ON / OFF CRC. When CRC on, malformed packets are ignored.

Connected existing CRC function for METEOMAN sondes, using the same "CRC" checkbox logic.
2020-08-20 15:22:11 -03:00
eried
1c9ccbc247 Rename m4txevent::assert and m0apptxevent::assert (adding "_event")
Copied from f6cdf6a722#
2020-08-19 09:43:04 +02:00
Белоусов Олег
3559e37a76 Audio FIR filter for CW 2020-08-17 16:07:06 +03:00
Erwin Ried
cc2046b607
Merge pull request #119 from euquiq/MIC_TX_RX_with_volume_and_squelch
MIC TX Now includes RX with Volume and Squelch
2020-08-15 15:53:48 +02:00
Erwin Ried
5a3da3bd6a
Merge branch 'v1.2' into add-heading-to-geomap 2020-08-15 15:52:53 +02:00
Erwin Ried
40785e8094
Merge pull request #135 from euquiq/radiosonde-vaisala-rs41-decoding
Radiosonde-app-Vaisala-rs41-decoding
2020-08-15 15:51:10 +02:00
Erwin Ried
f519168602 Merge branch 'new-footer' into v1.2 2020-08-15 15:48:49 +02:00
Erwin Ried
8251cf7dbb Hide the seconds at the beginning 2020-08-15 15:46:53 +02:00
euquiq
c7b0fbc359 Radiosonde-app-Vaisala-rs41-decoding
Added the Vaisala RS41 data packet decoding.

Changed the default freq from 402.0 to 402.7 Mhz, since it is more popular freq.

Lowered the frequency stepping, so it is easier to fine-tune the exact freq center, if needed.

Sonde's Serial ID is passed into the VIEW MAP, so now the sonde is labelled on the map.
2020-08-14 15:51:12 -03:00
Joel Wetzell
bbae5047d1 Fix ADSB heading math and add heading to ADSB log 2020-08-10 22:55:20 -05:00
Erwin Ried
871be0199a In some scenarios, the new line does not work if is not called thru the write function 2020-08-08 23:08:54 +02:00
klockee
b300cc258e Cleaned up and tweaked 2020-08-08 04:24:57 -04:00
euquiq
72f3eea131 MIC TX Now includes RX with Volume and Squelch
You can enable RX and adjust VOLUME  and SQUELCH into your liking.

Sadly enough, you will NOT be able to use VOICE ACTIVATION when RX is enabled (to ensure there will be NO audio feedback defeating the VA sensing)

A "bug" that won over me, but perhaps and hopefully other coder can easily fix:  The Vumeter will momentarily "dissappear" when enabling RX. But it will reappear as soon as you start TX. Or when you turn off RX.

I enabled the PEAK LEVEL MARK on the Vumeter, so you can easily see in which level your input voice / signal is peaking and regulate the MIC gain accordingly in an easier / more robust way.

Side enhancement: Took off the dark green, yellow and red coloring from the vumeter when no signal is present, and replaced it with dark_grey. I know that some coloring is "eye-candy" but the vu-meter is more readable with this new contrast.
2020-08-07 00:19:37 -03:00
klockee
9c9021f63b Added new toolbar in main menu 2020-08-05 01:03:51 -04:00
Joel Wetzell
542879b74b allow negative heading in maths 2020-07-25 10:21:56 -05:00
Joel Wetzell
f08949acd7 Add Heading to ADSB and Map Updating 2020-07-24 16:09:21 -05:00
Joel Wetzell
abb4385859 Adjust polar to point and bearing drawing 2020-07-01 13:16:48 -05:00
eried
ddffc69937 Clear with buffer clear 2020-06-28 20:06:00 +02:00
euquiq
8443008dfa New Antenna length Calculator
It reads the antennas definition from a txt file:

WHIPCALC/ANTENNAS.TXT

Inside the textfile you place each antenna you own with the following sintaxis:

<antenna label> <elements length in mm, separated by a space>

For example:

ANT500 185 315 450 586 724 862

Input the required frequency, adjust the wave type (full / half / quarter, etc.) and the calculator will return the antenna length (metric and imperial) while also calculating how much you need to expand the fitting antennas you got defined on the txt.

It may return up to 8 matching antennas, which is more than enough (normally you will have 2, perhaps 3 telescopic antennas around for your portapack)

If by any chance your antennas txt got more than 8 antennas, and more than 8 matches the length of the freq / wave you want, it will only show the first 8 matching antennas and will warn you at the bottom that there are even more results (hidden).

All calculations now are rounded into the best integer, considering first decimal, so precision is double than the original antenna calculator app.
2020-06-27 23:59:11 -03:00
eried
3c304b9fe3 Mute and unmute audio 2020-06-08 01:22:58 +02:00
eried
2d765f8120 Persistent setting for speaker icon 2020-06-08 01:21:11 +02:00
Erwin Ried
4aaac8545b
Pocsag improvements (#20)
* Update analog_audio_app.cpp (#353)

* Adding phase field (extracted from @jamesshao8 repo)
2020-05-09 13:13:21 +02:00
Erwin Ried
d17130092c
Merge branch 'master' into gps-sim 2020-04-20 10:51:20 +02:00
Erwin Ried
e43f814861
Analog tv app (#334)
* Analog TV app (PAL)

* Icon on main menu

* Analog TV should be yellow

Works for PAL only know, it would be nice to add NTSC in the future, or some customizable sync
2020-04-20 06:50:24 +02:00
Erwin Ried
40531e9230
Ble receiver (#337)
* BLE app

* Update ui_navigation.cpp

Co-authored-by: Furrtek <furrtek@gmail.com>
2020-04-20 06:50:03 +02:00
Erwin Ried
d95bda65ce
Nrf24l01 demodulation (#338)
* NRF demodulation

* Update ui_navigation.cpp
2020-04-20 06:45:28 +02:00
Erwin Ried
aa2eb86ae9 GPS Sim 2020-04-18 01:17:01 +02:00
KimIV
127a7982c3
Update tpms_packet.cpp (#309)
I experimented with my sensors from a Ford Kuga. For data verification I used the Autel MaxiTPMS TS508 device.
2020-02-27 05:54:27 +01:00
Ziggy
b690165da3 UI Redesign for Portapack-Havoc (#268)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224b9ea3e56ff1c8a66246e7ecf30e41f.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9a30371b643c42949066fb7d2441daf.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Setup: Format clock reference frequency in MHz, not Hz.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.

* Pin config: VREGMODE=1, add other pins for completeness, comment detail

* Pin setup: More useful comments.

* Pin setup: Change some defaults, only set up PortaPack pins if detected.

* Pin setup: Disable LPC pull-ups on PP CPLD data bus, as CPLD is pulling up.

* Baseband: Allow larger HackRF firmware image.

* HackRF: Remove USER_INTERFACE CMake variable.

* CPLD: Make use of HackRF CPLD tool to generate code.

* Release: Add generation of MD5SUMS, SHA256SUMS during "make release"

* Clock generator: Match clock output currents to HackRF firmware.

Someday, we will share a code base again...

* CMake: Make "firmware" target part of the "all" target.

So now an unqualified "make" will make the firmware binary.

* CMake: Change how HackRF firmware is incorporated into binary.

Use the separate HackRF "RAM" binary. Get rid of the strip-dfu utility, since there's no longer a need to extract the binary from the DFU.

* CMake: Renamed GIT_REVISION* -> GIT_VERSION* to match HackRF build env.

* CMake: Bring git version handling closer to HackRF for code reuse.

* Travis-CI: Rework CI release artifact output.

* Travis-CI: Don't assign PROJECT_NAME within deploy-nightly.sh

* Travis-CI: Oops, don't include distro package for compiler...

...when also installing it from a third-party PPA.

* Travis-CI: Update GCC package, old one seems "retired"?

* Travis-CI: OK, the gcc-arm-none-eabi package is NOT current. Undoing...

* Travis-CI: Path oopsies.

* Travis-CI: More path confusion. I think this will do it. *touch wood*

* Travis-CI: Update build message sent to FreeNode #portapack IRC.

* Travis-CI: Break out BUILD_DATE from BUILD_NAME.

* Travis-CI: Introduce build directories, include MD5 and SHA256 hashes.

* Travis-CI: Fix MD5SUMS/SHA256SUMS paths.

* Travis-CI: Fix typo generating name for binary links.

* Power: Keep 1V8 off until after VAA is brought up.

* Power: Bring up VAA in several steps to keep voltage swing small.

* About: Show longer commit/tag version string.

* Versioning: Report non-CI builds with "local-" version prefix.

* Travis-CI: Report new nightly build site in IRC notification.

* Change use of GIT_VERSION to VERSION_STRING
Required by prior merge.

* Git: add "hackrf" submodule.

* CMake: Use hackrf submodule for build, stop pulling during build.

* Travis: Fix build paths due to CMake submodule changes.

* Travis: Explicitly update submodules recursively

* Revert "Travis: Explicitly update submodules recursively"

This reverts commit b246438d805f431e727e01b7407540e932e89ee1.

* Travis: Try to sort out hackrf submodule output paths...

* Travis: I don't know what I'm doing.

* CMake: "make firmware" problem due to target vs. path used for dependency.

* HackRF: Incorporate YAML security fix.

* CMake: Fix more places where targets should be used...

...instead of paths to outputs.

* CMake: Add DFU file to "make firmware" outputs

* HackRF: Update submodule for CMake m0_bin.s path fix.

* added encoder support to alphanum

* added encoder support to freq-keypad

* UI Redesign -
added BtnGrid & NewButton widgets and created a new button-based
layout, with both encoder and touchscreen are supported.

* Scanner changes:
- using SCANNER.TXT for frequencies, ranges also supported. file
format is the same as any other frequency file, thus can be edited
via the Frequency Manager.
- add nfm bw selector & time-to-wait to the UI
- add SCANNER.TXT to sdcard dir

orignal idea & scanner file adopted from user 'bicurico'

* small changes to scanner

* remember last category on frequency manager

* fix: cast int16_t instead of uint16_t (although i doubt we will
have more than 32767 buttons in the array...)

* added a missing last_category_id on freq manager
2019-10-29 22:53:54 +01:00
Tyler Roussos
9f587e6085 Fix Issue 88, Wrong Longitude in ADSB RX (#242) 2019-05-21 16:44:14 +01:00
furrtek
b1e72c788b Added RFM69 helper
LGE tool: new frames
Text entry string length bugfix
2019-05-05 00:43:36 +01:00
furrtek
162cb4c9fa Added LGE app, nothing to see here
Update button in signal gen now works for shape change
2019-02-06 17:34:53 +00:00
Jared Boone
e7c0fa394b PortaPack Sync, take 2 (#215)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224b9ea3e56ff1c8a66246e7ecf30e41f.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9a30371b643c42949066fb7d2441daf.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.
2019-02-03 18:25:11 +00:00
Maescool
920b98f7c9 Upstream merge to make new revision of PortaPack work (#206)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Fix merge conflicts
2019-01-11 06:56:21 +00:00
furrtek
1d13389b5a Bias-T now works in capture mode
Simplified soundboard app, still some work to do
Merge remote-tracking branch 'upstream/master'
2018-12-18 16:25:21 +00:00
Jared Boone
8feb79c710 Constrain enum type to address warning about underlying type conversion. 2018-08-05 15:17:48 -07:00
furrtek
609235b19f Testing external clock detection and auto-switch
Simplified audio spectrum computation and transfer
ACARS RX in debug mode
Disabled ABI warnings
Updated binary
2018-06-12 07:55:12 +01:00
furrtek
dc5d6fef70 Started work on ACARS RX
Added ACARS frequencies file
Moved non-implemented apps menu items down
2018-06-10 10:15:43 +01:00
furrtek
5c1ba9b90d Added cursor to audio spectrum view 2018-05-22 04:43:04 +01:00
furrtek
b813b32593 Added an audio FFT view in Wideband FM receive
Tried speeding up fill_rectangle for clearing the waveform widget
2018-05-21 18:46:48 +01:00
furrtek
b11c3c94b6 Added tone key mix ratio in Settings -> Audio
Renamed Setup to Settings
Updated binary
2018-05-16 09:45:13 +01:00
furrtek
b29c1d9749 Finally found what was eating all the RAM :D
Re-enabled the tone key selector in Soundboard
Soundboard now uses OutputStream, like Replay
Constexpr'd a bunch of consts which were going to BSS section
Exiting an app now goes back to main menu
Cleaned up Message array
2018-05-15 23:35:30 +01:00
furrtek
8573f760be Added basic APRS transmit
Added goertzel algo
Updated binary
2018-02-23 20:21:24 +00:00
furrtek
7fd987a2b4 Added support for multiple sample rates in IQ record
Support for any sample rate <= 500k in IQ replay
Fixed bias-t power not activating in TX
Removed RSSI pitch output option (awful code)
Udated binary
2018-02-22 07:04:19 +00:00
RndmNmbr
36e5682406
Update ui_widget.hpp
Added include of <functional> to allow for a clean build with g++ 7.2.1 20170904
2018-02-03 13:41:40 -05:00
furrtek
57c759627d Fixed mic tx not working the first time it was entered
Fixed SD card FAT wipe (buffer size too big)
Cleared some warnings from ADSB rx
Updated binary
2018-02-01 11:17:51 +00:00
furrtek
441a266dc4 Added back scanning in BHT TX
Added file creation date display in File Manager
2018-01-09 21:12:19 +00:00
furrtek
f0c912be2e Added Bias-T toggle confirmation
Backlight setting save bugfix
Updated binary
2018-01-08 03:47:37 +00:00
furrtek
3193c6ee99 Added bias-T status icon
Merged radio settings in one screen
2018-01-07 23:13:08 +00:00
furrtek
c9381f1418 Added loop option in Replay app
Updated binary
2017-12-11 04:14:54 +00:00