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d9be5677e3665299dedf2759b47bfff974ba0a4b
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4 Commits

Author SHA1 Message Date
Jared Boone
a03a72474d Insert IDIVC into audio MCLK path, so it can be divided. 2016-01-29 15:17:05 -08:00
Jared Boone
fe7dcdc613 Function to adjust clock generator XTAL PLL frequency. 
Needed to switch PLLA to operate in fractional mode.
 2015-08-24 12:09:11 -07:00
Jared Boone
c025a2bba2 Code to shut down ClockManager-controlled devices. 2015-08-01 13:43:58 -07:00
Jared Boone
dc6fee8370 Initial firmware commit. 2015-07-08 08:39:24 -07:00