Commit Graph

296 Commits

Author SHA1 Message Date
Bernd Herzog
db5fcaba44 Merge remote-tracking branch 'origin/next' into ssd_to_usb 2023-04-01 19:24:53 +02:00
GullCode
95eb1e6d59 Loading pmem if enable before displaying splashscreen 2023-03-31 14:24:54 +02:00
Bernd Herzog
8dd68a0811 added copy of hackrf usb stack 2023-03-29 17:05:11 +02:00
Bernd Herzog
f5d4fce945 added flash utility 2023-03-28 14:39:00 +02:00
GullCode
30c1f9f594 Changed hamitup to converter icons and functions 2023-03-27 14:22:35 +02:00
gullradriel
92b622deac
Added HamItUp option (#840)
* Added HamItUp option to allow quick offset of the tuned frequency
* New HamItUp icon for top bar
* HamItUp checkbox status and frequency persistent settings in Settings/Radio
2023-03-22 08:46:58 +01:00
gullradriel
69df16d6e2
Level meter (#827)
* added possibility to scale vertically from bottom to top

* Squeleton of Level app from Recon App

* Working LevelApp

* Tweaking peak and display or RSSI chart

* Moved widgets, prepared audio decode, added working ctcss display and peak hold max rssi val

* Added RSSIGraph

* Updated Level to use RSSIGraph

* Graph as lines instead as bars

* correct CTCSS hiding if not in NFM mode

* added back db value and drawing for it. clamped to [-100,20] db

* added back audio, volume, better placement for buttons, db graph

* Using different icon for Level app, unless someone provide a better one

* fixed CTCSS position

---------

Co-authored-by: GullCode <gullradriel@hotmail.com>
2023-03-10 14:25:38 +01:00
GullCode
1d521819ff
Merge pull request #711 from GullCode/recon-app
Recon app
2022-10-08 13:46:50 +02:00
Jimi Sanchez
958c9a1bfa
Merge pull request #4 from jimilinuxguy/replayapp
Replayapp
2022-09-19 13:13:21 -04:00
Jimi Sanchez
861db600e8
Merge branch 'replayapp' into master 2022-09-19 13:12:15 -04:00
GullCode
9d59c07855 Added Recon app under 'Receive' menu 2022-09-13 23:58:03 +02:00
GullCode
5551c6a676 Fixing branch, moving block, adding quote 2022-05-04 10:29:12 +02:00
GullCode
c75c4685cd Added a ui_config flag to manage gui return icon status 2022-05-03 14:23:58 +02:00
Jimi Sanchez
2efab19bf6 Merge branch 'next' of https://github.com/jimilinuxguy/portapack-mayhem into next 2022-04-28 17:06:50 -04:00
Jimi Sanchez
4562228b55 Fixing spelling of Wav Viewer 2022-04-28 17:06:45 -04:00
Jimi Sanchez
6af0d4e751
Merge branch 'next' into jimi-merging-conflicts 2022-04-28 17:03:24 -04:00
Jimi Sanchez
0fed174a80 Adding back wipe sd 2022-04-28 16:58:44 -04:00
Jimi Sanchez
d71c759480
Merge branch 'next' into jimi-merging-conflicts 2022-04-28 13:55:44 -04:00
Jimi Sanchez
c1e568f62c Removing wipe sd 2022-04-28 13:54:17 -04:00
Jimi Sanchez
f48980e381 Adding playlist to CMakeLists 2022-04-28 13:52:47 -04:00
Žiga Deisinger
ee9b4c89bd Fix #494 - Change App Titles
I choose what I think are the best Titles based on existing titles/class names and so on. There were also inconsistencies between TX and Transmit and RX and receive. I renamed them to shorter version TX and RX also added it as suffix where possible to make it clearer in what mode you are in. If you have any other title suggestions or changes please use Add comment on Files Changed Screen so I can change it.
2022-04-26 23:09:24 +02:00
Jimi Sanchez
584c46af64 Initial commit of playlist app for replaying capture files sequentially 2022-04-03 19:38:06 -04:00
Erwin Ried
2a11b59ab7
Merge pull request #424 from intoxsick/custom-splash-screen-from-sd
Custom splash screen from sd
2021-11-24 12:35:41 +01:00
Arjan Onwezen
6bc2cbeda9 ISO datetime for Clock, FileManager, Frequency manager
Added option to show/hide clock (with/without date)
2021-05-17 23:16:15 +02:00
East2West
f15cf78101
Add APRS Receiving App 2021-03-11 22:27:19 -06:00
Erwin Ried
3c30c127e2
Update ui_navigation.cpp 2021-02-16 09:09:49 +01:00
GullCode
5d73175a17 Added missing brace 2021-01-27 16:39:50 +01:00
Erwin Ried
64bdd3e018
Merge pull request #263 from euquiq/JAMMER-TX_COOLDOWN_TIMERS_IN_SECONDS
JAMMER NOW INCLUDES TWO TIMERS
2021-01-12 21:57:04 +01:00
euquiq
928bce083a Cosmetics + Jammer now in green + Jitter
I think the Jammer deserves a green icon, since it actually does it job pretty well.

Then there is a Jitter parameter. It allows to introduce a jitter from 1/60th of a second up to 60/60th of a second (a full one). It will delay / move forward either the TX or the cooldown period for a maximum of a half of the time you choose as jitter.

Meaning: If I choose 60/60th, a full second of jitter, it will produce a random number from 1 to 60.

Then it will calculate jitter = 30 - randomnumber

THen it will "add" that (positive or negative) time to the  time counter for the next jitter change of state.
2021-01-08 11:54:21 -03:00
Erwin Ried
2fa6df596a New icon and shortcut 2020-11-01 17:26:29 +01:00
Erwin Ried
911f0c8881
Merge pull request #213 from euquiq/Fix-APRS-TX-app
Fix aprs tx app
2020-10-27 21:57:50 +01:00
Erwin Ried
01cfd360fe
Merge pull request #215 from euquiq/looking_glass_full_bw_cascade_scanner
New "looking Glass" app
2020-10-27 21:57:11 +01:00
euquiq
01ba7a57ea New "looking Glass" app
Capable of showing a cascade with full bandwidth scan. You can select Min and Max Mhz for the cascade.

You can move a marker so to (aproximately) know  a particular frequency on the cascade. If you press the select button, the app will jump into the RX -> AUDIO app, already tuned into the just "marked" frequency.

This first version SURELY has space for lots of optimizations and improvement in general.
2020-10-21 13:21:34 -03:00
euquiq
95f7eda9c5 APRS TX app is working fine now!
Several old bugs squashed.

On the APRS side, most notably, SSID numbers where shifted left twice, instead of once, and bits 5,6 where not properly set.

On AX.25 side, the bit stuffing part of the encoder was not placing the zero bit on the right place.

Finally, I changed APRS icon from ORANGE to GREEN, since even this may be a simple app, now it's doing its work as intended.
2020-10-10 20:24:11 -03:00
dqs105
b15b781039 Added options for enabling CLKOUT.
- CLKOUT can be enabled in Radio settings and status bar.
- Fixed a typo(I believe) in ui_navigation.
2020-09-16 19:27:56 +08:00
Erwin Ried
55783a60f5 Update ui_navigation.cpp 2020-09-15 23:13:31 +02:00
Erwin Ried
bf068abba3 Microphone app button rename 2020-09-15 23:12:50 +02:00
Erwin Ried
95be75a8af
Merge pull request #172 from dqs105/new_splash
New custom splash.
2020-09-14 22:53:59 +02:00
dqs105
5cbbf62c5f Removed drawRAW.
- BMP files can be loaded directly now, so it can be removed.
2020-08-29 10:53:26 +08:00
dqs105
80f074b82f Added BMP file support.
- Now can load splash.bmp!
2020-08-28 12:23:52 +08:00
dqs105
ac12bf5f50 modify file extension from data to bin. 2020-08-27 23:16:05 +08:00
dqs105
8edaa1e51e Added new custom splash.
- Custom splash now can be loaded from SD card.
2020-08-27 23:07:48 +08:00
euquiq
a2b28c097c Menu changes
Moved the MIC TX RX into the main menu.

Changed scanner color from yellow to green, since it is kind of rounded up into an acceptable functionality.

Also, did a bit of cleanup on the code spacing inside the menues.
2020-08-26 10:48:09 -03:00
Erwin Ried
40785e8094
Merge pull request #135 from euquiq/radiosonde-vaisala-rs41-decoding
Radiosonde-app-Vaisala-rs41-decoding
2020-08-15 15:51:10 +02:00
Erwin Ried
f519168602 Merge branch 'new-footer' into v1.2 2020-08-15 15:48:49 +02:00
Erwin Ried
004fddf4de Skip splash when pressing titlebar, if enabled 2020-08-15 03:20:55 +02:00
euquiq
7b19c0a35f Update ui_navigation.cpp
Now the Sonde App icon is in green: All sondes in the original proposal are working!
2020-08-14 20:11:24 -03:00
Erwin Ried
c7082455c1 Super simple about 2020-08-08 23:06:53 +02:00
Erwin Ried
fcbb26051b ACARS is not implemented 2020-08-08 15:09:12 +02:00
klockee
90d2dbb49c More cleanup 2020-08-08 04:48:29 -04:00
klockee
b300cc258e Cleaned up and tweaked 2020-08-08 04:24:57 -04:00
klockee
9c9021f63b Added new toolbar in main menu 2020-08-05 01:03:51 -04:00
klockee
bf2a04ab57 Fix title in splash screen 2020-08-03 05:48:26 -04:00
BuildTools
246e628df8 Added interactive titlebar! 2020-08-01 21:55:09 -04:00
eried
934f4b07c4 Speaker option for the H1 2020-06-08 01:23:44 +02:00
Gregory Fenton
07e9b50abe
Remove clunky text when changing to HackRF mode 2020-06-07 20:22:04 +01:00
eried
43870e97bc Icons and colors changes 2020-06-07 06:27:59 +02:00
Erwin Ried
52b951f705 No space after question mark 2020-06-01 01:59:12 +02:00
Erwin Ried
7058c872f3 Fork rename 2020-05-12 16:12:16 +02:00
Erwin Ried
15a6bc17b5 More small tweaks to the icons 2020-05-11 16:33:53 +02:00
Erwin Ried
b48b0efe5c This color scheme looks solid, more small tweaks 2020-05-11 15:30:21 +02:00
Erwin Ried
904339370b Some new icons and colors 2020-05-11 14:19:39 +02:00
Erwin Ried
cf75bb0db2 Remote is also not implemented 2020-05-11 11:12:01 +02:00
Erwin Ried
4597c61c57 Removing playdead calls, non-implemented entries in main menu, and small UI tweaks 2020-05-11 11:07:45 +02:00
Erwin Ried
683bf5dfd9 Adding Debug app back 2020-04-21 14:22:09 +02:00
Erwin Ried
d17130092c
Merge branch 'master' into gps-sim 2020-04-20 10:51:20 +02:00
Erwin Ried
e43f814861
Analog tv app (#334)
* Analog TV app (PAL)

* Icon on main menu

* Analog TV should be yellow

Works for PAL only know, it would be nice to add NTSC in the future, or some customizable sync
2020-04-20 06:50:24 +02:00
Erwin Ried
40531e9230
Ble receiver (#337)
* BLE app

* Update ui_navigation.cpp

Co-authored-by: Furrtek <furrtek@gmail.com>
2020-04-20 06:50:03 +02:00
Erwin Ried
d95bda65ce
Nrf24l01 demodulation (#338)
* NRF demodulation

* Update ui_navigation.cpp
2020-04-20 06:45:28 +02:00
Erwin Ried
b49740e451 Moving to transmitters menu 2020-04-18 11:28:03 +02:00
Erwin Ried
5ebc7cc665 Main menu icon for GPS sim 2020-04-18 01:17:13 +02:00
Ziggy
b690165da3 UI Redesign for Portapack-Havoc (#268)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Setup: Format clock reference frequency in MHz, not Hz.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.

* Pin config: VREGMODE=1, add other pins for completeness, comment detail

* Pin setup: More useful comments.

* Pin setup: Change some defaults, only set up PortaPack pins if detected.

* Pin setup: Disable LPC pull-ups on PP CPLD data bus, as CPLD is pulling up.

* Baseband: Allow larger HackRF firmware image.

* HackRF: Remove USER_INTERFACE CMake variable.

* CPLD: Make use of HackRF CPLD tool to generate code.

* Release: Add generation of MD5SUMS, SHA256SUMS during "make release"

* Clock generator: Match clock output currents to HackRF firmware.

Someday, we will share a code base again...

* CMake: Make "firmware" target part of the "all" target.

So now an unqualified "make" will make the firmware binary.

* CMake: Change how HackRF firmware is incorporated into binary.

Use the separate HackRF "RAM" binary. Get rid of the strip-dfu utility, since there's no longer a need to extract the binary from the DFU.

* CMake: Renamed GIT_REVISION* -> GIT_VERSION* to match HackRF build env.

* CMake: Bring git version handling closer to HackRF for code reuse.

* Travis-CI: Rework CI release artifact output.

* Travis-CI: Don't assign PROJECT_NAME within deploy-nightly.sh

* Travis-CI: Oops, don't include distro package for compiler...

...when also installing it from a third-party PPA.

* Travis-CI: Update GCC package, old one seems "retired"?

* Travis-CI: OK, the gcc-arm-none-eabi package is NOT current. Undoing...

* Travis-CI: Path oopsies.

* Travis-CI: More path confusion. I think this will do it. *touch wood*

* Travis-CI: Update build message sent to FreeNode #portapack IRC.

* Travis-CI: Break out BUILD_DATE from BUILD_NAME.

* Travis-CI: Introduce build directories, include MD5 and SHA256 hashes.

* Travis-CI: Fix MD5SUMS/SHA256SUMS paths.

* Travis-CI: Fix typo generating name for binary links.

* Power: Keep 1V8 off until after VAA is brought up.

* Power: Bring up VAA in several steps to keep voltage swing small.

* About: Show longer commit/tag version string.

* Versioning: Report non-CI builds with "local-" version prefix.

* Travis-CI: Report new nightly build site in IRC notification.

* Change use of GIT_VERSION to VERSION_STRING
Required by prior merge.

* Git: add "hackrf" submodule.

* CMake: Use hackrf submodule for build, stop pulling during build.

* Travis: Fix build paths due to CMake submodule changes.

* Travis: Explicitly update submodules recursively

* Revert "Travis: Explicitly update submodules recursively"

This reverts commit b246438d805f431e727e01b7407540e932e89ee1.

* Travis: Try to sort out hackrf submodule output paths...

* Travis: I don't know what I'm doing.

* CMake: "make firmware" problem due to target vs. path used for dependency.

* HackRF: Incorporate YAML security fix.

* CMake: Fix more places where targets should be used...

...instead of paths to outputs.

* CMake: Add DFU file to "make firmware" outputs

* HackRF: Update submodule for CMake m0_bin.s path fix.

* added encoder support to alphanum

* added encoder support to freq-keypad

* UI Redesign -
added BtnGrid & NewButton widgets and created a new button-based
layout, with both encoder and touchscreen are supported.

* Scanner changes:
- using SCANNER.TXT for frequencies, ranges also supported. file
format is the same as any other frequency file, thus can be edited
via the Frequency Manager.
- add nfm bw selector & time-to-wait to the UI
- add SCANNER.TXT to sdcard dir

orignal idea & scanner file adopted from user 'bicurico'

* small changes to scanner

* remember last category on frequency manager

* fix: cast int16_t instead of uint16_t (although i doubt we will
have more than 32767 buttons in the array...)

* added a missing last_category_id on freq manager
2019-10-29 22:53:54 +01:00
furrtek
162cb4c9fa Added LGE app, nothing to see here
Update button in signal gen now works for shape change
2019-02-06 17:34:53 +00:00
Jared Boone
e7c0fa394b PortaPack Sync, take 2 (#215)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.
2019-02-03 18:25:11 +00:00
furrtek
1d13389b5a Bias-T now works in capture mode
Simplified soundboard app, still some work to do
Merge remote-tracking branch 'upstream/master'
2018-12-18 16:25:21 +00:00
furrtek
609235b19f Testing external clock detection and auto-switch
Simplified audio spectrum computation and transfer
ACARS RX in debug mode
Disabled ABI warnings
Updated binary
2018-06-12 07:55:12 +01:00
furrtek
dc5d6fef70 Started work on ACARS RX
Added ACARS frequencies file
Moved non-implemented apps menu items down
2018-06-10 10:15:43 +01:00
furrtek
b813b32593 Added an audio FFT view in Wideband FM receive
Tried speeding up fill_rectangle for clearing the waveform widget
2018-05-21 18:46:48 +01:00
furrtek
b11c3c94b6 Added tone key mix ratio in Settings -> Audio
Renamed Setup to Settings
Updated binary
2018-05-16 09:45:13 +01:00
furrtek
b29c1d9749 Finally found what was eating all the RAM :D
Re-enabled the tone key selector in Soundboard
Soundboard now uses OutputStream, like Replay
Constexpr'd a bunch of consts which were going to BSS section
Exiting an app now goes back to main menu
Cleaned up Message array
2018-05-15 23:35:30 +01:00
furrtek
d0ce9610b5 Added some skeletons
Renamed "Scanner" to "Search"
Modified splash bitmap
Disabled Nuoptix TX
2018-03-27 12:52:07 +01:00
furrtek
8573f760be Added basic APRS transmit
Added goertzel algo
Updated binary
2018-02-23 20:21:24 +00:00
furrtek
7fd987a2b4 Added support for multiple sample rates in IQ record
Support for any sample rate <= 500k in IQ replay
Fixed bias-t power not activating in TX
Removed RSSI pitch output option (awful code)
Udated binary
2018-02-22 07:04:19 +00:00
furrtek
f0c912be2e Added Bias-T toggle confirmation
Backlight setting save bugfix
Updated binary
2018-01-08 03:47:37 +00:00
furrtek
3193c6ee99 Added bias-T status icon
Merged radio settings in one screen
2018-01-07 23:13:08 +00:00
furrtek
3d2dacaf29 Added range file and range type to frequency manager (mainly for jammer)
Made MenuView use less widgets, hopefully preventing crashes with large
lists
Fixed M10 sonde crash on packet receive
Updated about screen
Updated binary
2017-12-08 18:58:46 +00:00
furrtek
17b238f3a8 Added "test app" as a draft zone for... stuff
Added second signature for M2K2 radiosonde
2017-10-30 02:00:39 +01:00
furrtek
d47f292d3a Radiosonde RX now understands Meteomodem's M10 correctly
Updated binary
2017-10-27 18:54:50 +02:00
furrtek
6e7b2c751f Added wav file viewer
Fileman open now allows going into subdirectories
Updated binary
2017-10-15 15:53:40 +01:00
furrtek
40a71d32a2 Added keyfob UI and debug functions
Fixed hex display truncated to 32 bits instead of 64
Updated binary
2017-10-14 16:30:49 +01:00
furrtek
d3222c27ca Started working on radiosonde RX
Removed some warnings
Better handling of absent map file in GeoMap ?
2017-10-05 05:38:45 +01:00
furrtek
73d47cd77d Added remaining buttons for TouchTunes remote
LCR transmit UI cleanup
CC1101 data whitening function
Uniformized tx progress message handling
2017-09-24 20:05:42 +01:00
furrtek
26949773bb Added TouchTunes remote 2017-09-23 12:02:32 +01:00
furrtek
c0f51c2690 Date and time display widget
Disabled handwriting text input (not that useful for now)
Bugfix: Trim long filenames in fileman
Slight cleanup of 7-seg display widget
2017-09-20 07:50:59 +01:00
furrtek
37ce81383d Added file manager 2017-09-19 20:14:56 +01:00
furrtek
950bc2b1d2 AFSK RX works (only Bell202 for now)
AFSK RX always logs to file
Removed frequency and bw settings from modem setup view
Updated binary
Bugfix: Binary display shifted one bit
Bugfix: Frequency manager views freezing if SD card not present
Bugfix: Menuview blinking arrow not showing up at the right position
Bugfix: Freeze if console written to while it's hidden
Broken: LCR TX, needs UI update
2017-09-02 08:28:29 +01:00
furrtek
42439d1885 Started writing (copying...) AFSK RX
Encoders: removed bit duration setting (frame duration is more useful)
2017-08-29 09:42:04 +01:00
furrtek
9d902bc224 ADSB RX now works \o/
Added tabs in RDS TX, multiple groups can be sent at once
Bugfix: text not updating on UI after text prompt
2017-08-16 10:02:57 +01:00
furrtek
e5fef6bb89 Added tabs to BHT TX and Jammer
Updated firmware binary
2017-08-12 00:27:05 +01:00
Jared Boone
f726a54f25 Fix whitespace to match furrtek/portapack-havoc. 2017-08-09 17:08:30 -07:00