5 Commits

Author	SHA1	Message	Date
Jared Boone	751ae92509	CPLD: Switch sense of LCD_RD/WR pins. ... Should keep CPLD settled when in HackRF mode.	2017-07-20 16:33:55 -07:00
Jared Boone	b3ee884f16	I2S RX: Set RX SDA pin to correct SCUMUX mode. ... It's left in GPIO mode ordinarily, because of CPLD programming earlier in boot-up.	2017-05-26 16:50:34 -07:00
Jared Boone	0294165481	Extract LOTS of stuff into an audio API. ... Prevent all manner of type and implementation leakage.	2016-02-05 16:25:43 -08:00
Jared Boone	19764ce693	Swap function of P2_8, P2_4 in schematic, firmware, CPLD. ... gpio_unused: P2_4 -> P2_8 gpio_lcd_rd: P2_8 -> P2_4 P2_8 is a very long line, shared with DFU button. Revise schematic to match CPLD signal names.	2015-08-27 16:54:38 -07:00
Jared Boone	dc6fee8370	Initial firmware commit.	2015-07-08 08:39:24 -07:00