mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-15 12:38:11 +00:00
353 lines
9.3 KiB
C
Executable File
353 lines
9.3 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file LPC8xx/serial_lld.c
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* @brief LPC8xx low level serial driver code.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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#if LPC8xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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/** @brief UART0 serial driver identifier.*/
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SerialDriver SD1;
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#endif
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#if LPC8xx_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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/** @brief UART1 serial driver identifier.*/
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SerialDriver SD2;
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#endif
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#if LPC8xx_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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/** @brief UART2 serial driver identifier.*/
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SerialDriver SD3;
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#endif
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/** @brief Driver default configuration.*/
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static const SerialConfig default_config = {
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SERIAL_DEFAULT_BITRATE,
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(CFG_DL8 | CFG_NOPARITY | CFG_STOP1)
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};
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Error handling routine.
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*
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* @param[in] sdp communication channel associated to the UART
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* @param[in] err UART STAT register value
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*/
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static void set_error(SerialDriver *sdp, IOREG32 err) {
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flagsmask_t sts = 0;
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if (err & STAT_OVERRUN)
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sts |= SD_OVERRUN_ERROR;
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if (err & STAT_PARITYERR)
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sts |= SD_PARITY_ERROR;
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if (err & STAT_FRAMERR)
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sts |= SD_FRAMING_ERROR;
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if (err & STAT_RXBRK)
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sts |= SD_BREAK_DETECTED;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, sts);
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chSysUnlockFromIsr();
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}
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/**
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* @brief Common IRQ handler.
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* @note Tries hard to clear all the pending interrupt sources, we don't
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* want to go through the whole ISR and have another interrupt soon
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* after.
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*
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* @param[in] u pointer to an UART I/O block
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* @param[in] sdp communication channel associated to the UART
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*/
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static void serve_interrupt(SerialDriver *sdp) {
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LPC_USART_TypeDef *u = sdp->uart;
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while (u->INTSTAT) {
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if (u->INTSTAT & STAT_RXRDY) {
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chSysLockFromIsr();
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if (chIQIsEmptyI(&sdp->iqueue))
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chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
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if (chIQPutI(&sdp->iqueue, u->RXDATA) < Q_OK)
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chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
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chSysUnlockFromIsr();
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}
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if (u->INTSTAT & STAT_TXRDY) {
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msg_t b;
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chSysLockFromIsr();
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b = chOQGetI(&sdp->oqueue);
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chSysUnlockFromIsr();
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if (b < Q_OK) {
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u->INTENCLR = STAT_TXRDY;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
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chSysUnlockFromIsr();
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break;
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}
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else {
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u->TXDATA = b;
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}
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}
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if (u->INTSTAT & (STAT_OVERRUN | STAT_DELTARXBRK |
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STAT_FRAMERR | STAT_PARITYERR) ) {
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IOREG32 stat = u->STAT;
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set_error(sdp, stat);
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u->STAT = stat;
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}
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}
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}
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/**
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* @brief Attempts a TX preload.
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*/
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static void preload(SerialDriver *sdp) {
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LPC_USART_TypeDef *u = sdp->uart;
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if (u->STAT & STAT_TXIDLE) {
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msg_t b = chOQGetI(&sdp->oqueue);
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if (b < Q_OK) {
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chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
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return;
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}
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u->TXDATA = b;
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}
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u->INTENSET = STAT_TXRDY;
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}
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/**
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* @brief Driver output notification.
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*/
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#if LPC8xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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static void notify1(GenericQueue *qp) {
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(void)qp;
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preload(&SD1);
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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static void notify2(GenericQueue *qp) {
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(void)qp;
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preload(&SD2);
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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static void notify3(GenericQueue *qp) {
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(void)qp;
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preload(&SD3);
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}
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#endif
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/**
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* @brief UARTn IRQ handlers.
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*
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* @isr
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*/
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#if LPC8xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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CH_IRQ_HANDLER(Vector4C) {
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CH_IRQ_PROLOGUE();
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serve_interrupt( &SD1 );
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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CH_IRQ_HANDLER(Vector50) {
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CH_IRQ_PROLOGUE();
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serve_interrupt( &SD2 );
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CH_IRQ_EPILOGUE();
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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CH_IRQ_HANDLER(Vector54) {
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CH_IRQ_PROLOGUE();
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serve_interrupt( &SD3 );
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CH_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level serial driver initialization.
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*
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* @notapi
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*/
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void sd_lld_init(void) {
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#if LPC8xx_SERIAL_USE_UART0
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sdObjectInit(&SD1, NULL, notify1);
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SD1.uart = LPC_USART0;
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#endif
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#if LPC8xx_SERIAL_USE_UART1
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sdObjectInit(&SD2, NULL, notify2);
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SD2.uart = LPC_USART1;
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#endif
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#if LPC8xx_SERIAL_USE_UART2
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sdObjectInit(&SD3, NULL, notify3);
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SD3.uart = LPC_USART2;
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#endif
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/* Reset fractional baudrate generator */
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LPC_SYSCON->PRESETCTRL &= ~(1<<2);
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LPC_SYSCON->PRESETCTRL |= (1<<2);
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LPC_SYSCON->UARTCLKDIV = LPC8xx_SERIAL_UARTCLKDIV;
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LPC_SYSCON->UARTFRGDIV = LPC8xx_SERIAL_UARTFRGDIV;
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LPC_SYSCON->UARTFRGMULT = LPC8xx_SERIAL_UARTFRGMULT;
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}
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/**
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* @brief Low level serial driver configuration and (re)start.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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* @param[in] config the architecture-dependent serial driver configuration.
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* If this parameter is set to @p NULL then a default
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* configuration is used.
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*
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* @notapi
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*/
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void sd_lld_start( SerialDriver *sdp, const SerialConfig *config ) {
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if (config == NULL)
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config = &default_config;
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if (sdp->state == SD_STOP) {
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#if LPC8xx_SERIAL_USE_UART0
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if (&SD1 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<14); // Enable Clk
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LPC_SYSCON->PRESETCTRL &= ~(1<<3); // Reset peripheral
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LPC_SYSCON->PRESETCTRL |= (1<<3);
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nvicEnableVector(UART0_IRQn,
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CORTEX_PRIORITY_MASK(LPC8xx_SERIAL_UART0_IRQ_PRIORITY));
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART1
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if (&SD2 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<15); // Enable Clk
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LPC_SYSCON->PRESETCTRL &= ~(1<<4); // Reset peripheral
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LPC_SYSCON->PRESETCTRL |= (1<<4);
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nvicEnableVector(UART1_IRQn,
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CORTEX_PRIORITY_MASK(LPC8xx_SERIAL_UART1_IRQ_PRIORITY));
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART2
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if (&SD3 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<16); // Enable Clk
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LPC_SYSCON->PRESETCTRL &= ~(1<<5); // Reset peripheral
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LPC_SYSCON->PRESETCTRL |= (1<<5);
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nvicEnableVector(UART2_IRQn,
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CORTEX_PRIORITY_MASK(LPC8xx_SERIAL_UART2_IRQ_PRIORITY));
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}
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#endif
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}
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sdp->uart->BRG = (LPC8xx_SERIAL_U_PCLK / (config->sc_speed << 4)) -1;
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sdp->uart->INTENSET = STAT_FRAMERR | STAT_OVERRUN |
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STAT_PARITYERR | STAT_DELTARXBRK |
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STAT_RXRDY;
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sdp->uart->CFG = config->sc_cfg | CFG_ENA;
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}
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/**
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* @brief Low level serial driver stop.
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* @details De-initializes the UART, stops the associated clock, resets the
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* interrupt vector.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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*
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* @notapi
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*/
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void sd_lld_stop( SerialDriver *sdp ) {
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if (sdp->state == SD_READY) {
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sdp->uart->INTENCLR = STAT_TXRDY | STAT_RXRDY;
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sdp->uart->CFG = 0;
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#if LPC8xx_SERIAL_USE_UART0
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if (&SD1 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<12);
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nvicDisableVector(UART0_IRQn);
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return;
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART1
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if (&SD2 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<13);
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nvicDisableVector(UART1_IRQn);
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return;
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}
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#endif
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#if LPC8xx_SERIAL_USE_UART2
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if (&SD3 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<14);
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nvicDisableVector(UART2_IRQn);
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return;
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}
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#endif
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}
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}
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#endif /* HAL_USE_SERIAL */
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/** @} */
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