mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-13 19:54:39 +00:00
033c4e9a5b
* Updated style * Updated files * fixed new line * Updated spacing * File fix WIP * Updated to clang 13 * updated comment style * Removed old comment code
343 lines
10 KiB
C++
343 lines
10 KiB
C++
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "baseband_sgpio.hpp"
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#include "baseband.hpp"
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#include "utility.hpp"
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namespace baseband {
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/*
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struct PinConfig {
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P_OUT_CFG p_out_cfg;
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P_OE_CFG p_oe_cfg { P_OE_CFG::GPIO_OE };
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constexpr SGPIOPinConfig(
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P_OUT_CFG p_out_cfg
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) :
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p_out_cfg(p_out_cfg)
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{
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}
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};
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static constexpr bool slice_mode_multislice = false;
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static constexpr P_OUT_CFG output_multiplexing_mode =
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slice_mode_multislice ? P_OUT_CFG::DOUT_DOUTM8C : P_OUT_CFG::DOUT_DOUTM8A;
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static constexpr std::array<PinConfig, 16> pin_config { {
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[PIN_D0] = { output_multiplexing_mode, SLICE_A },
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[PIN_D1] = { output_multiplexing_mode, SLICE_I },
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[PIN_D2] = { output_multiplexing_mode, },
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[PIN_D3] = { output_multiplexing_mode, },
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[PIN_D4] = { output_multiplexing_mode, },
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[PIN_D5] = { output_multiplexing_mode, },
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[PIN_D6] = { output_multiplexing_mode, },
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[PIN_D7] = { output_multiplexing_mode, },
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[PIN_CLKIN] = { P_OUT_CFG::DOUT_DOUTM1, },
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[PIN_CAPTURE] = { P_OUT_CFG::DOUT_DOUTM1, },
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[PIN_DISABLE] = { P_OUT_CFG::GPIO_OUT, },
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[PIN_DIRECTION] = { P_OUT_CFG::GPIO_OUT, },
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[PIN_INVERT] = { P_OUT_CFG::GPIO_OUT, },
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[PIN_DECIM0] = { P_OUT_CFG::GPIO_OUT, },
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[PIN_DECIM1] = { P_OUT_CFG::DOUT_DOUTM1, },
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[PIN_DECIM2] = { P_OUT_CFG::GPIO_OUT, },
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} };
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*/
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/*
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static constexpr std::array<LPC_SGPIO_OUT_MUX_CFG_Type, 16> out_mux_cfg_receive {
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{ },
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};
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static constexpr std::array<LPC_SGPIO_OUT_MUX_CFG_Type, 16> out_mux_cfg_transmit {
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{ },
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};
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*/
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enum class P_OUT_CFG : uint8_t {
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DOUT_DOUTM1 = 0x0,
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DOUT_DOUTM2A = 0x1,
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DOUT_DOUTM2B = 0x2,
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DOUT_DOUTM2C = 0x3,
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GPIO_OUT = 0x4,
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DOUT_DOUTM4A = 0x5,
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DOUT_DOUTM4B = 0x6,
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DOUT_DOUTM4C = 0x7,
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CLK_OUT = 0x8,
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DOUT_DOUTM8A = 0x9,
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DOUT_DOUTM8B = 0xa,
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DOUT_DOUTM8C = 0xb,
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};
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enum class P_OE_CFG : uint8_t {
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GPIO_OE = 0x0,
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DOUT_OEM1 = 0x4,
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DOUT_OEM2 = 0x5,
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DOUT_OEM4 = 0x6,
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DOUT_OEM8 = 0x7,
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};
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enum class CONCAT_ORDER : uint8_t {
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SELF_LOOP = 0x0,
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TWO_SLICES = 0x1,
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FOUR_SLICES = 0x2,
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EIGHT_SLICES = 0x3,
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};
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enum class CONCAT_ENABLE : uint8_t {
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EXTERNAL_DATA_PIN = 0x0,
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CONCATENATE_DATA = 0x1,
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};
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enum class CLK_CAPTURE_MODE : uint8_t {
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RISING_CLOCK_EDGE = 0,
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FALLING_CLOCK_EDGE = 1,
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};
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enum class PARALLEL_MODE : uint8_t {
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SHIFT_1_BIT_PER_CLOCK = 0x0,
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SHIFT_2_BITS_PER_CLOCK = 0x1,
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SHIFT_4_BITS_PER_CLOCK = 0x2,
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SHIFT_1_BYTE_PER_CLOCK = 0x3,
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};
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enum {
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PIN_D0 = 0,
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PIN_D1 = 1,
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PIN_D2 = 2,
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PIN_D3 = 3,
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PIN_D4 = 4,
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PIN_D5 = 5,
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PIN_D6 = 6,
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PIN_D7 = 7,
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PIN_CLKIN = 8,
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PIN_CAPTURE = 9,
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PIN_DISABLE = 10,
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PIN_DIRECTION = 11,
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PIN_INVERT = 12,
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PIN_SYNC_EN = 13,
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PIN_P81 = 14,
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PIN_P78 = 15,
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};
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enum class Slice : uint8_t {
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A = 0,
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B = 1,
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C = 2,
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D = 3,
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E = 4,
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F = 5,
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G = 6,
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H = 7,
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I = 8,
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J = 9,
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K = 10,
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L = 11,
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M = 12,
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N = 13,
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O = 14,
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P = 15,
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};
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constexpr bool slice_mode_multislice = false;
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constexpr uint8_t pos_count_multi_slice = 0x1f;
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constexpr uint8_t pos_count_single_slice = 0x03;
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constexpr Slice slice_order[]{
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Slice::A,
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Slice::I,
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Slice::E,
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Slice::J,
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Slice::C,
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Slice::K,
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Slice::F,
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Slice::L,
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Slice::B,
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Slice::M,
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Slice::G,
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Slice::N,
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Slice::D,
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Slice::O,
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Slice::H,
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Slice::P,
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};
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constexpr uint32_t gpio_outreg(const Direction direction) {
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return ((direction == Direction::Transmit) ? (1U << PIN_DIRECTION) : 0U) | (1U << PIN_DISABLE);
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}
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constexpr uint32_t gpio_oenreg(const Direction direction) {
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return (0U << PIN_P78) | (0U << PIN_P81) | (0U << PIN_SYNC_EN) | (0U << PIN_INVERT) | (1U << PIN_DIRECTION) | (1U << PIN_DISABLE) | (0U << PIN_CAPTURE) | (0U << PIN_CLKIN) | ((direction == Direction::Transmit) ? 0xffU : 0x00U);
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}
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constexpr uint32_t out_mux_cfg(const P_OUT_CFG out, const P_OE_CFG oe) {
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return (toUType(out) << 0) | (toUType(oe) << 4);
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}
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constexpr uint32_t data_sgpio_mux_cfg(
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const CONCAT_ENABLE concat_enable,
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const CONCAT_ORDER concat_order) {
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return (1U << 0) | (0U << 1) | (0U << 3) | (3U << 5) | (1U << 7) | (0U << 9) | (toUType(concat_enable) << 11) | (toUType(concat_order) << 12);
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}
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constexpr uint32_t data_slice_mux_cfg(
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const PARALLEL_MODE parallel_mode,
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const CLK_CAPTURE_MODE clk_capture_mode) {
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return (0U << 0) | (toUType(clk_capture_mode) << 1) | (1U << 2) | (0U << 3) | (0U << 4) | (toUType(parallel_mode) << 6) | (0U << 8);
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}
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constexpr uint32_t pos(
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const uint32_t pos,
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const uint32_t pos_reset) {
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return (pos << 0) | (pos_reset << 8);
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}
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constexpr uint32_t data_pos(
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const bool multi_slice) {
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return pos(
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(multi_slice ? pos_count_multi_slice : pos_count_single_slice),
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(multi_slice ? pos_count_multi_slice : pos_count_single_slice));
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}
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constexpr CONCAT_ENABLE data_concat_enable(
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const bool input_slice,
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const bool single_slice) {
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return (input_slice || single_slice)
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? CONCAT_ENABLE::EXTERNAL_DATA_PIN
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: CONCAT_ENABLE::CONCATENATE_DATA;
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}
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constexpr CONCAT_ORDER data_concat_order(
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const bool input_slice,
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const bool single_slice) {
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return (input_slice || single_slice)
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? CONCAT_ORDER::SELF_LOOP
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: CONCAT_ORDER::EIGHT_SLICES;
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}
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constexpr CLK_CAPTURE_MODE data_clk_capture_mode(
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const Direction direction) {
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return (direction == Direction::Transmit)
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? CLK_CAPTURE_MODE::RISING_CLOCK_EDGE
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: CLK_CAPTURE_MODE::RISING_CLOCK_EDGE;
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}
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constexpr P_OUT_CFG data_p_out_cfg(
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const bool multi_slice) {
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return (multi_slice)
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? P_OUT_CFG::DOUT_DOUTM8C
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: P_OUT_CFG::DOUT_DOUTM8A;
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}
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static const sgpio_resources_t sgpio_resources = {
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.base = {.clk = &LPC_CGU->BASE_PERIPH_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 6)},
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.branch = {.cfg = &LPC_CCU1->CLK_PERIPH_SGPIO_CFG, .stat = &LPC_CCU1->CLK_PERIPH_SGPIO_STAT},
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.reset = {.output_index = 57},
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};
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void SGPIO::init() {
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base_clock_enable(&sgpio_resources.base);
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branch_clock_enable(&sgpio_resources.branch);
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peripheral_reset(&sgpio_resources.reset);
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}
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void SGPIO::configure(const Direction direction) {
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disable_all_slice_counters();
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// Set data pins as input, temporarily.
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LPC_SGPIO->GPIO_OENREG = gpio_oenreg(Direction::Receive);
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// Now that data pins are inputs, safe to change CPLD direction.
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LPC_SGPIO->GPIO_OUTREG = gpio_outreg(direction);
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LPC_SGPIO->OUT_MUX_CFG[8] = out_mux_cfg(P_OUT_CFG::DOUT_DOUTM1, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[9] = out_mux_cfg(P_OUT_CFG::DOUT_DOUTM1, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[10] = out_mux_cfg(P_OUT_CFG::GPIO_OUT, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[11] = out_mux_cfg(P_OUT_CFG::GPIO_OUT, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[12] = out_mux_cfg(P_OUT_CFG::GPIO_OUT, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[13] = out_mux_cfg(P_OUT_CFG::GPIO_OUT, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[14] = out_mux_cfg(P_OUT_CFG::DOUT_DOUTM1, P_OE_CFG::GPIO_OE);
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LPC_SGPIO->OUT_MUX_CFG[15] = out_mux_cfg(P_OUT_CFG::GPIO_OUT, P_OE_CFG::GPIO_OE);
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const auto data_out_mux_cfg = out_mux_cfg(data_p_out_cfg(slice_mode_multislice), P_OE_CFG::GPIO_OE);
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for (size_t i = 0; i < 8; i++) {
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LPC_SGPIO->OUT_MUX_CFG[i] = data_out_mux_cfg;
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}
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// Now that output enable sources are set, enable data bus in correct direction.
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LPC_SGPIO->GPIO_OENREG = gpio_oenreg(direction);
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const auto slice_gpdma = Slice::H;
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const size_t slice_count = slice_mode_multislice ? 8 : 1;
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const auto clk_capture_mode = data_clk_capture_mode(direction);
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const auto single_slice = !slice_mode_multislice;
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uint32_t slice_enable_mask = 0;
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for (size_t i = 0; i < slice_count; i++) {
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const auto slice = slice_order[i];
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const auto slice_index = toUType(slice);
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const auto input_slice = (i == 0) && (direction != Direction::Transmit);
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const auto concat_order = data_concat_order(input_slice, single_slice);
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const auto concat_enable = data_concat_enable(input_slice, single_slice);
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LPC_SGPIO->SGPIO_MUX_CFG[slice_index] = data_sgpio_mux_cfg(
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concat_enable,
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concat_order);
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LPC_SGPIO->SLICE_MUX_CFG[slice_index] = data_slice_mux_cfg(
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PARALLEL_MODE::SHIFT_1_BYTE_PER_CLOCK,
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clk_capture_mode);
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LPC_SGPIO->PRESET[slice_index] = 0;
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LPC_SGPIO->COUNT[slice_index] = 0;
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LPC_SGPIO->POS[slice_index] = data_pos(slice_mode_multislice);
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LPC_SGPIO->REG[slice_index] = 0;
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LPC_SGPIO->REG_SS[slice_index] = 0;
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slice_enable_mask |= (1U << slice_index);
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}
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if (!slice_mode_multislice) {
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const auto slice_index = toUType(slice_gpdma);
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LPC_SGPIO->SGPIO_MUX_CFG[slice_index] = data_sgpio_mux_cfg(
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CONCAT_ENABLE::CONCATENATE_DATA,
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CONCAT_ORDER::SELF_LOOP);
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LPC_SGPIO->SLICE_MUX_CFG[slice_index] = data_slice_mux_cfg(
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PARALLEL_MODE::SHIFT_1_BIT_PER_CLOCK,
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clk_capture_mode);
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LPC_SGPIO->PRESET[slice_index] = 0;
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LPC_SGPIO->COUNT[slice_index] = 0;
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LPC_SGPIO->POS[slice_index] = pos(0x1f, 0x1f);
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LPC_SGPIO->REG[slice_index] = 0x11111111;
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LPC_SGPIO->REG_SS[slice_index] = 0x11111111;
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slice_enable_mask |= (1 << slice_index);
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}
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set_slice_counter_enables(slice_enable_mask);
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}
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} /* namespace baseband */
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