mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-15 12:38:11 +00:00
104 lines
2.3 KiB
C++
104 lines
2.3 KiB
C++
extern "C" {
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#include "usb_serial_device_to_host.h"
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#include "usb_serial_cdc.h"
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}
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#include "usb_serial_shell.hpp"
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#include "usb_serial.hpp"
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#include "portapack.hpp"
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#include "usb_serial_host_to_device.hpp"
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/lpc43xx/usb.h>
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namespace portapack {
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void USBSerial::initialize() {
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enable_xtal();
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disable_pll0();
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setup_pll0();
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enable_pll0();
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setup_usb_clock();
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setup_usb_serial_controller();
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init_serial_usb_driver(&SUSBD1);
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shellInit();
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init_host_to_device();
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}
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void USBSerial::dispatch() {
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if (!connected)
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return;
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if (shell_created == false) {
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shell_created = true;
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create_shell(_eventDispatcher);
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}
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schedule_host_to_device_transfer();
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}
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void USBSerial::dispatch_transfer() {
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complete_host_to_device_transfer();
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}
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void USBSerial::on_channel_opened() {
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connected = true;
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}
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void USBSerial::on_channel_closed() {
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connected = false;
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}
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void USBSerial::enable_xtal() {
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LPC_CGU->XTAL_OSC_CTRL.ENABLE = 0;
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LPC_CGU->XTAL_OSC_CTRL.HF = 0;
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}
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void USBSerial::disable_pll0() {
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LPC_CGU->PLL0USB_CTRL.PD = 1;
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LPC_CGU->PLL0USB_CTRL.AUTOBLOCK = 1;
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LPC_CGU->PLL0USB_CTRL.BYPASS = 0;
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LPC_CGU->PLL0USB_CTRL.DIRECTI = 0;
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LPC_CGU->PLL0USB_CTRL.DIRECTO = 0;
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LPC_CGU->PLL0USB_CTRL.CLKEN = 0;
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LPC_CGU->PLL0USB_CTRL.FRM = 0;
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LPC_CGU->PLL0USB_CTRL.CLK_SEL = 0x06; // 12MHz internal XTAL
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}
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void USBSerial::setup_pll0() {
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/* use XTAL_OSC as clock source for PLL0USB */
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while (LPC_CGU->PLL0USB_STAT.LOCK) {
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}
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// /* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
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// /* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */
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LPC_CGU->PLL0USB_MDIV = 0x06167FFA;
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LPC_CGU->PLL0USB_NP_DIV = 0x00302062;
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LPC_CGU->PLL0USB_CTRL.PD = 1;
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LPC_CGU->PLL0USB_CTRL.DIRECTI = 1;
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LPC_CGU->PLL0USB_CTRL.DIRECTO = 1;
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LPC_CGU->PLL0USB_CTRL.CLKEN = 1;
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}
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void USBSerial::enable_pll0() {
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// /* power on PLL0USB and wait until stable */
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LPC_CGU->PLL0USB_CTRL.PD = 0;
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while (!LPC_CGU->PLL0USB_STAT.LOCK) {
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}
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}
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void USBSerial::setup_usb_clock() {
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/* use PLL0USB as clock source for USB0 */
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LPC_CGU->BASE_USB0_CLK.AUTOBLOCK = 1;
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LPC_CGU->BASE_USB0_CLK.CLK_SEL = 0x07;
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LPC_CGU->BASE_USB0_CLK.PD = 0;
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}
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} // namespace portapack
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