mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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207 lines
7.0 KiB
C
Executable File
207 lines
7.0 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file LPC11Uxx/serial_lld.h
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* @brief LPC11Uxx low level serial driver header.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#ifndef _SERIAL_LLD_H_
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#define _SERIAL_LLD_H_
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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#define IIR_SRC_MASK 0x0F
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#define IIR_SRC_NONE 0x01
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#define IIR_SRC_MODEM 0x00
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#define IIR_SRC_TX 0x02
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#define IIR_SRC_RX 0x04
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#define IIR_SRC_ERROR 0x06
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#define IIR_SRC_TIMEOUT 0x0C
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#define IER_RBR 1
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#define IER_THRE 2
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#define IER_STATUS 4
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#define LCR_WL5 0
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#define LCR_WL6 1
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#define LCR_WL7 2
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#define LCR_WL8 3
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#define LCR_STOP1 0
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#define LCR_STOP2 4
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#define LCR_NOPARITY 0
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#define LCR_PARITYODD 0x08
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#define LCR_PARITYEVEN 0x18
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#define LCR_PARITYONE 0x28
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#define LCR_PARITYZERO 0x38
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#define LCR_BREAK_ON 0x40
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#define LCR_DLAB 0x80
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#define FCR_ENABLE 1
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#define FCR_RXRESET 2
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#define FCR_TXRESET 4
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#define FCR_TRIGGER0 0
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#define FCR_TRIGGER1 0x40
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#define FCR_TRIGGER2 0x80
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#define FCR_TRIGGER3 0xC0
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#define LSR_RBR_FULL 1
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#define LSR_OVERRUN 2
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#define LSR_PARITY 4
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#define LSR_FRAMING 8
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#define LSR_BREAK 0x10
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#define LSR_THRE 0x20
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#define LSR_TEMT 0x40
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#define LSR_RXFE 0x80
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#define TER_ENABLE 0x80
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief UART0 driver enable switch.
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* @details If set to @p TRUE the support for UART0 is included.
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* @note The default is @p TRUE .
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*/
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#if !defined(LPC_SERIAL_USE_UART0) || defined(__DOXYGEN__)
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#define LPC_SERIAL_USE_UART0 TRUE
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#endif
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/**
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* @brief FIFO preload parameter.
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* @details Configuration parameter, this values defines how many bytes are
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* preloaded in the HW transmit FIFO for each interrupt, the maximum
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* value is 16 the minimum is 1.
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* @note An high value reduces the number of interrupts generated but can
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* also increase the worst case interrupt response time because the
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* preload loops.
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*/
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#if !defined(LPC_SERIAL_FIFO_PRELOAD) || defined(__DOXYGEN__)
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#define LPC_SERIAL_FIFO_PRELOAD 16
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#endif
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/**
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* @brief UART0 PCLK divider.
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*/
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#if !defined(LPC_SERIAL_UART0CLKDIV) || defined(__DOXYGEN__)
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#define LPC_SERIAL_UART0CLKDIV 1
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#endif
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/**
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* @brief UART0 interrupt priority level setting.
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*/
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#if !defined(LPC_SERIAL_UART0_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define LPC_SERIAL_UART0_IRQ_PRIORITY 3
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if (LPC_SERIAL_UART0CLKDIV < 1) || (LPC_SERIAL_UART0CLKDIV > 255)
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#error "invalid LPC_SERIAL_UART0CLKDIV setting"
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#endif
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#if (LPC_SERIAL_FIFO_PRELOAD < 1) || (LPC_SERIAL_FIFO_PRELOAD > 16)
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#error "invalid LPC_SERIAL_FIFO_PRELOAD setting"
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#endif
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/**
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* @brief UART0 clock.
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*/
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#define LPC_SERIAL_UART0_PCLK \
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(LPC_MAINCLK / LPC_SERIAL_UART0CLKDIV)
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief LPC11xx Serial Driver configuration structure.
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* @details An instance of this structure must be passed to @p sdStart()
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* in order to configure and start a serial driver operations.
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*/
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typedef struct {
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/**
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* @brief Bit rate.
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*/
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uint32_t sc_speed;
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/**
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* @brief Initialization value for the LCR register.
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*/
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uint32_t sc_lcr;
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/**
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* @brief Initialization value for the FCR register.
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*/
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uint32_t sc_fcr;
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} SerialConfig;
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/**
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* @brief @p SerialDriver specific data.
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*/
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#define _serial_driver_data \
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_base_asynchronous_channel_data \
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/* Driver state.*/ \
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sdstate_t state; \
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/* Input queue.*/ \
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InputQueue iqueue; \
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/* Output queue.*/ \
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OutputQueue oqueue; \
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/* Input circular buffer.*/ \
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uint8_t ib[SERIAL_BUFFERS_SIZE]; \
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/* Output circular buffer.*/ \
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uint8_t ob[SERIAL_BUFFERS_SIZE]; \
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/* End of the mandatory fields.*/ \
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/* Pointer to the USART registers block.*/ \
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LPC_USART_Type *uart;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if LPC_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
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extern SerialDriver SD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sd_lld_init(void);
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void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
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void sd_lld_stop(SerialDriver *sdp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SERIAL */
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#endif /* _SERIAL_LLD_H_ */
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/** @} */
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