mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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152 lines
6.2 KiB
C
Executable File
152 lines
6.2 KiB
C
Executable File
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC560Pxx/spc560p_registry.h
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* @brief SPC560Pxx capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef _SPC560P_REGISTRY_H_
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#define _SPC560P_REGISTRY_H_
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name SPC560Pxx capabilities
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* @{
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*/
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/* eDMA attributes.*/
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#define SPC5_HAS_EDMA TRUE
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#define SPC5_EDMA_NCHANNELS 16
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#define SPC5_EDMA_HAS_MUX TRUE
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/* LINFlex attributes.*/
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#define SPC5_HAS_LINFLEX0 TRUE
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#define SPC5_LINFLEX0_PCTL 48
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#define SPC5_LINFLEX0_RXI_HANDLER vector79
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#define SPC5_LINFLEX0_TXI_HANDLER vector80
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#define SPC5_LINFLEX0_ERR_HANDLER vector81
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#define SPC5_LINFLEX0_RXI_NUMBER 79
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#define SPC5_LINFLEX0_TXI_NUMBER 80
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#define SPC5_LINFLEX0_ERR_NUMBER 81
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#define SPC5_LINFLEX0_CLK (halSPCGetSystemClock() / 1)
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#define SPC5_HAS_LINFLEX1 TRUE
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#define SPC5_LINFLEX1_PCTL 49
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#define SPC5_LINFLEX1_RXI_HANDLER vector99
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#define SPC5_LINFLEX1_TXI_HANDLER vector100
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#define SPC5_LINFLEX1_ERR_HANDLER vector101
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#define SPC5_LINFLEX1_RXI_NUMBER 99
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#define SPC5_LINFLEX1_TXI_NUMBER 100
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#define SPC5_LINFLEX1_ERR_NUMBER 101
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#define SPC5_LINFLEX1_CLK (halSPCGetSystemClock() / 1)
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#define SPC5_HAS_LINFLEX2 FALSE
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#define SPC5_HAS_LINFLEX3 FALSE
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/* SIUL attributes.*/
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#define SPC5_HAS_SIUL TRUE
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#define SPC5_SIUL_NUM_PORTS 8
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#define SPC5_SIUL_NUM_PCRS 108
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#define SPC5_SIUL_NUM_PADSELS 36
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/* FlexPWM attributes.*/
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#define SPC5_HAS_FLEXPWM0 TRUE
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#define SPC5_FLEXPWM0_PCTL 41
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#define SPC5_FLEXPWM0_RF0_HANDLER vector179
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#define SPC5_FLEXPWM0_COF0_HANDLER vector180
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#define SPC5_FLEXPWM0_CAF0_HANDLER vector181
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#define SPC5_FLEXPWM0_RF1_HANDLER vector182
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#define SPC5_FLEXPWM0_COF1_HANDLER vector183
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#define SPC5_FLEXPWM0_CAF1_HANDLER vector184
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#define SPC5_FLEXPWM0_RF2_HANDLER vector185
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#define SPC5_FLEXPWM0_COF2_HANDLER vector186
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#define SPC5_FLEXPWM0_CAF2_HANDLER vector187
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#define SPC5_FLEXPWM0_RF3_HANDLER vector188
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#define SPC5_FLEXPWM0_COF3_HANDLER vector189
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#define SPC5_FLEXPWM0_CAF3_HANDLER vector190
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#define SPC5_FLEXPWM0_FFLAG_HANDLER vector191
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#define SPC5_FLEXPWM0_REF_HANDLER vector192
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#define SPC5_FLEXPWM0_RF0_NUMBER 179
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#define SPC5_FLEXPWM0_COF0_NUMBER 180
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#define SPC5_FLEXPWM0_CAF0_NUMBER 181
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#define SPC5_FLEXPWM0_RF1_NUMBER 182
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#define SPC5_FLEXPWM0_COF1_NUMBER 183
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#define SPC5_FLEXPWM0_CAF1_NUMBER 184
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#define SPC5_FLEXPWM0_RF2_NUMBER 185
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#define SPC5_FLEXPWM0_COF2_NUMBER 186
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#define SPC5_FLEXPWM0_CAF2_NUMBER 187
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#define SPC5_FLEXPWM0_RF3_NUMBER 188
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#define SPC5_FLEXPWM0_COF3_NUMBER 189
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#define SPC5_FLEXPWM0_CAF3_NUMBER 190
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#define SPC5_FLEXPWM0_FFLAG_NUMBER 191
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#define SPC5_FLEXPWM0_REF_NUMBER 192
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#define SPC5_FLEXPWM0_CLK SPC5_MCONTROL_CLK
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#define SPC5_HAS_FLEXPWM1 FALSE
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/* eTimer attributes.*/
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#define SPC5_HAS_ETIMER0 TRUE
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#define SPC5_ETIMER0_PCTL 38
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#define SPC5_ETIMER0_TC0IR_HANDLER vector157
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#define SPC5_ETIMER0_TC1IR_HANDLER vector158
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#define SPC5_ETIMER0_TC2IR_HANDLER vector159
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#define SPC5_ETIMER0_TC3IR_HANDLER vector160
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#define SPC5_ETIMER0_TC4IR_HANDLER vector161
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#define SPC5_ETIMER0_TC5IR_HANDLER vector162
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#define SPC5_ETIMER0_WTIF_HANDLER vector165
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#define SPC5_ETIMER0_RCF_HANDLER vector167
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#define SPC5_ETIMER0_TC0IR_NUMBER 157
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#define SPC5_ETIMER0_TC1IR_NUMBER 158
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#define SPC5_ETIMER0_TC2IR_NUMBER 159
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#define SPC5_ETIMER0_TC3IR_NUMBER 160
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#define SPC5_ETIMER0_TC4IR_NUMBER 161
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#define SPC5_ETIMER0_TC5IR_NUMBER 162
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#define SPC5_ETIMER0_WTIF_NUMBER 165
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#define SPC5_ETIMER0_RCF_NUMBER 167
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#define SPC5_ETIMER0_CLK SPC5_MCONTROL_CLK
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#define SPC5_HAS_ETIMER1 TRUE
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#define SPC5_ETIMER1_PCTL 39
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#define SPC5_ETIMER1_TC0IR_HANDLER vector168
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#define SPC5_ETIMER1_TC1IR_HANDLER vector169
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#define SPC5_ETIMER1_TC2IR_HANDLER vector170
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#define SPC5_ETIMER1_TC3IR_HANDLER vector171
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#define SPC5_ETIMER1_TC4IR_HANDLER vector172
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#define SPC5_ETIMER1_TC5IR_HANDLER vector173
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#define SPC5_ETIMER1_RCF_HANDLER vector178
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#define SPC5_ETIMER1_TC0IR_NUMBER 168
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#define SPC5_ETIMER1_TC1IR_NUMBER 169
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#define SPC5_ETIMER1_TC2IR_NUMBER 170
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#define SPC5_ETIMER1_TC3IR_NUMBER 171
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#define SPC5_ETIMER1_TC4IR_NUMBER 172
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#define SPC5_ETIMER1_TC5IR_NUMBER 173
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#define SPC5_ETIMER1_RCF_NUMBER 178
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#define SPC5_ETIMER1_CLK SPC5_MCONTROL_CLK
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#define SPC5_HAS_ETIMER2 FALSE
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/** @} */
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#endif /* _SPC560P_REGISTRY_H_ */
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/** @} */
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