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https://github.com/portapack-mayhem/mayhem-firmware.git
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291 lines
9.2 KiB
C
Executable File
291 lines
9.2 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file LPC8xx/pal_lld.h
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* @brief LPC8xx GPIO low level driver header.
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*
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* @addtogroup PAL
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* @{
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*/
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#ifndef _PAL_LLD_H_
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#define _PAL_LLD_H_
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_INPUT_ANALOG
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @brief GPIO port setup info.
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*/
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/**
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* @brief GPIO static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialized the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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* @note The @p IOCON block is not configured, initially all pins have
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* enabled pullups and are programmed as GPIO. It is responsibility
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* of the various drivers to reprogram the pins in the proper mode.
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* Pins that are not handled by any driver may be programmed in
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* @p board.c.
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*/
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typedef struct {
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/** Initial value for FIO_PIN register.*/
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uint32_t data;
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/** Initial value for FIO_DIR register.*/
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uint32_t dir;
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} PALConfig;
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/**
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* @brief Width, in bits, of the I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 32
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/**
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* @brief Whole port mask.
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* @brief This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0x3FFFF)
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/**
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* @brief Digital I/O port sized unsigned type.
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*/
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typedef uint32_t ioportmask_t;
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/**
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* @brief Digital I/O modes.
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*/
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typedef uint32_t iomode_t;
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/**
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* @brief Port Identifier.
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*/
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typedef LPC_GPIO_PORT_TypeDef *ioportid_t;
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/*===========================================================================*/
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/* I/O Ports Identifiers. */
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/*===========================================================================*/
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/**
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* @brief GPIO0 port identifier.
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*/
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#define IOPORT1 LPC_GPIO_PORT
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#define GPIO0 LPC_GPIO_PORT
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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/*===========================================================================*/
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/**
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* @brief Low level PAL subsystem initialization.
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*
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* @param[in] config architecture-dependent ports configuration
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*
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* @notapi
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*/
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#define pal_lld_init(config) _pal_lld_init(config)
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/**
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* @brief Reads the physical I/O port states.
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*
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* @param[in] port port identifier
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* @return The port bits.
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*
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* @notapi
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*/
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#define pal_lld_readport(port) ((port)->PIN0)
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/**
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* @brief Reads the output latch.
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* @details The purpose of this function is to read back the latched output
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* value.
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*
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* @param[in] port port identifier
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* @return The latched logical states.
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*
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* @notapi
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*/
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#define pal_lld_readlatch(port) ((port)->SET0)
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/**
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* @brief Writes a bits mask on a I/O port.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be written on the specified port
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*
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* @notapi
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*/
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#define pal_lld_writeport(port, bits) ((port)->PIN0 = (bits))
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/**
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* @brief Sets a bits mask on a I/O port.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be ORed on the specified port
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*
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* @notapi
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*/
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#define pal_lld_setport(port, bits) ((port)->SET0 = (bits))
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/**
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* @brief Clears a bits mask on a I/O port.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be cleared on the specified port
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*
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* @notapi
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*/
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#define pal_lld_clearport(port, bits) ((port)->CLR0 = (bits))
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/**
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* @brief Toggles a bits mask on a I/O port.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be XORed on the specified port
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*
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* @api
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*/
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#define pal_lld_toggleport(port, bits) ((port)->NOT0 = (bits))
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/**
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* @brief Writes a group of bits.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] mask group mask
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* @param[in] offset group bit offset within the port
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* @param[in] bits bits to be written. Values exceeding the group width
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* are masked.
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*
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* @notapi
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*/
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#define pal_lld_writegroup(port, mask, offset, bits) \
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(port)->MASK0 = (~(mask) << (offset)); \
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(port)->MPIN0 = ((bits) << (offset))
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/**
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* @brief Pads group mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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* @note Programming an unknown or unsupported mode is silently ignored.
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*
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* @param[in] port port identifier
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* @param[in] mask group mask
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* @param[in] offset group bit offset within the port
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* @param[in] mode group mode
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*
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* @notapi
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*/
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#define pal_lld_setgroupmode(port, mask, offset, mode) \
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_pal_lld_setgroupmode(port, mask << offset, mode)
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/**
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* @brief Writes a logical state on an output pad.
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* @note This function is not meant to be invoked directly by the
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* application code.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] pad pad number within the port
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* @param[in] bit logical value, the value must be @p PAL_LOW or
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* @p PAL_HIGH
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*
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* @notapi
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*/
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#define pal_lld_writepad(port, pad, bit) \
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((port)->W0[(pad)] = (bit))
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/**
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* @brief Sets a pad logical state to @p PAL_HIGH.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] pad pad number within the port
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*
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* @notapi
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*/
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#define pal_lld_setpad(port, pad) \
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((port)->W0[(pad)] = 1)
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/**
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* @brief Clears a pad logical state to @p PAL_LOW.
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* @note The @ref PAL provides a default software implementation of this
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* functionality, implement this function if can optimize it by using
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* special hardware functionalities or special coding.
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*
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* @param[in] port port identifier
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* @param[in] pad pad number within the port
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*
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* @notapi
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*/
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#define pal_lld_clearpad(port, pad) \
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((port)->W0[(pad)] = 0)
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#if !defined(__DOXYGEN__)
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extern const PALConfig pal_default_config;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void _pal_lld_init(const PALConfig *config);
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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iomode_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_PAL */
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#endif /* _PAL_LLD_H_ */
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/** @} */
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