mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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465 lines
15 KiB
C
Executable File
465 lines
15 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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Concepts and parts of this file have been contributed by Uladzimir Pylinsky
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aka barthess.
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*/
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/**
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* @file AT91SAM7/i2c_lld.c
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* @brief AT91SAM7 I2C subsystem low level driver source.
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* @note I2C peripheral interrupts on AT91SAM7 platform must have highest
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* priority in system.
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*
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* @addtogroup I2C
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_I2C || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/** @brief I2C1 driver identifier.*/
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#if SAM7_I2C_USE_I2C1 || defined(__DOXYGEN__)
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I2CDriver I2CD1;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Wakes up the waiting thread.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] msg wakeup message
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*
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* @notapi
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*/
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#define wakeup_isr(i2cp, msg) { \
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chSysLockFromIsr(); \
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if ((i2cp)->thread != NULL) { \
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Thread *tp = (i2cp)->thread; \
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(i2cp)->thread = NULL; \
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tp->p_u.rdymsg = (msg); \
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chSchReadyI(tp); \
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} \
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chSysUnlockFromIsr(); \
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}
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/**
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* @brief Helper function.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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static void _i2c_lld_serve_rx_interrupt(I2CDriver *i2cp){
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if (i2cp->rxbytes == 1)
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AT91C_BASE_TWI->TWI_CR |= AT91C_TWI_STOP;
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*(i2cp->rxbuf) = AT91C_BASE_TWI->TWI_RHR;
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i2cp->rxbuf++;
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i2cp->rxbytes--;
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if (i2cp->rxbytes == 0){
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AT91C_BASE_TWI->TWI_IDR = AT91C_TWI_RXRDY;
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AT91C_BASE_TWI->TWI_IER = AT91C_TWI_TXCOMP;
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}
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}
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/**
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* @brief Helper function.
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* @note During write operation you do not need to set STOP manually.
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* It sets automatically when THR and shift registers becomes empty.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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static void _i2c_lld_serve_tx_interrupt(I2CDriver *i2cp){
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if (i2cp->txbytes == 0){
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AT91C_BASE_TWI->TWI_IDR = AT91C_TWI_TXRDY;
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AT91C_BASE_TWI->TWI_IER = AT91C_TWI_TXCOMP;
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}
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else{
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AT91C_BASE_TWI->TWI_THR = *(i2cp->txbuf);
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i2cp->txbuf++;
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i2cp->txbytes--;
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}
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}
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/**
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* @brief I2C shared ISR code.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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static void i2c_lld_serve_interrupt(I2CDriver *i2cp) {
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uint32_t sr;
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sr = AT91C_BASE_TWI->TWI_SR;
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/* this masking doing in official Atmel driver. Is it needed ??? */
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sr &= AT91C_BASE_TWI->TWI_IMR;
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if (sr & AT91C_TWI_NACK){
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i2cp->errors |= I2CD_ACK_FAILURE;
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wakeup_isr(i2cp, RDY_RESET);
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return;
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}
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if (sr & AT91C_TWI_RXRDY){
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_i2c_lld_serve_rx_interrupt(i2cp);
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}
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else if (sr & AT91C_TWI_TXRDY){
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_i2c_lld_serve_tx_interrupt(i2cp);
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}
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else if (sr & AT91C_TWI_TXCOMP){
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AT91C_BASE_TWI->TWI_IDR = AT91C_TWI_TXCOMP;
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wakeup_isr(i2cp, RDY_OK);
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}
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else
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chDbgPanic("Invalid value");
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if SAM7_I2C_USE_I2C1 || defined(__DOXYGEN__)
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/**
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* @brief I2C1 event interrupt handler.
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*
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* @notapi
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*/
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CH_IRQ_HANDLER(TWI_IRQHandler) {
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CH_IRQ_PROLOGUE();
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i2c_lld_serve_interrupt(&I2CD1);
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_I2C_USE_I2C1 */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level I2C driver initialization.
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*
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* @notapi
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*/
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void i2c_lld_init(void) {
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#if SAM7_I2C_USE_I2C1
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i2cObjectInit(&I2CD1);
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I2CD1.thread = NULL;
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I2CD1.txbuf = NULL;
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I2CD1.rxbuf = NULL;
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I2CD1.txbytes = 0;
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I2CD1.rxbytes = 0;
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#if SAM7_PLATFORM == SAM7S512 || SAM7_PLATFORM == SAM7S256 || SAM7_PLATFORM == SAM7S128 || SAM7_PLATFORM == SAM7S64
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_TWD | AT91C_PA4_TWCK;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_TWD | AT91C_PA4_TWCK;
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AT91C_BASE_PIOA->PIO_MDER = AT91C_PA3_TWD | AT91C_PA4_TWCK;
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AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PA3_TWD | AT91C_PA4_TWCK;
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#elif SAM7_PLATFORM == SAM7X512 || SAM7_PLATFORM == SAM7X256 || SAM7_PLATFORM == SAM7X128
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA10_TWD | AT91C_PA11_TWCK;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PA10_TWD | AT91C_PA11_TWCK;
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AT91C_BASE_PIOA->PIO_MDER = AT91C_PA10_TWD | AT91C_PA11_TWCK;
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AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PA10_TWD | AT91C_PA11_TWCK;
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#elif SAM7_PLATFORM == SAM7A3
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA0_TWD | AT91C_PA1_TWCK;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PA0_TWD | AT91C_PA1_TWCK;
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AT91C_BASE_PIOA->PIO_MDER = AT91C_PA0_TWD | AT91C_PA1_TWCK;
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AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PA0_TWD | AT91C_PA1_TWCK;
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#else
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#error "SAM7 platform not supported"
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#endif
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AIC_ConfigureIT(AT91C_ID_TWI,
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AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | SAM7_I2C_I2C1_IRQ_PRIORITY,
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TWI_IRQHandler);
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#endif /* STM32_I2C_USE_I2C1 */
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}
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/**
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* @brief Configures and activates the I2C peripheral.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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void i2c_lld_start(I2CDriver *i2cp) {
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volatile uint32_t fake;
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/* If in stopped state then enables the I2C clocks.*/
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if (i2cp->state == I2C_STOP) {
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#if SAM7_I2C_USE_I2C1
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if (&I2CD1 == i2cp) {
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/* enable peripheral clock */
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TWI);
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/* Enables associated interrupt vector.*/
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AIC_EnableIT(AT91C_ID_TWI);
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/* Reset */
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_SWRST;
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fake = AT91C_BASE_TWI->TWI_RHR;
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/* Set master mode */
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_MSDIS;
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_MSEN;
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/* Setup I2C parameters. */
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AT91C_BASE_TWI->TWI_CWGR = i2cp->config->cwgr;
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}
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#endif /* STM32_I2C_USE_I2C1 */
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}
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(void)fake;
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}
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/**
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* @brief Deactivates the I2C peripheral.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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void i2c_lld_stop(I2CDriver *i2cp) {
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/* If not in stopped state then disables the I2C clock.*/
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if (i2cp->state != I2C_STOP) {
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#if SAM7_I2C_USE_I2C1
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if (&I2CD1 == i2cp) {
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AT91C_BASE_TWI->TWI_IDR = AT91C_TWI_TXCOMP | AT91C_TWI_RXRDY |
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AT91C_TWI_TXRDY | AT91C_TWI_NACK;
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AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_TWI);
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AIC_DisableIT(AT91C_ID_TWI);
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}
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#endif
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}
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}
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/**
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* @brief Receives data via the I2C bus as master.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] addr slave device address
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* @param[out] rxbuf pointer to the receive buffer
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* @param[in] rxbytes number of bytes to be received
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* @param[in] timeout this value is ignored on SAM7 platform.
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*
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* @return The operation status.
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* @retval RDY_OK if the function succeeded.
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* @retval RDY_RESET if one or more I2C errors occurred, the errors can
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* be retrieved using @p i2cGetErrors().
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*
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* @notapi
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*/
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msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
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uint8_t *rxbuf, size_t rxbytes,
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systime_t timeout) {
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(void)timeout;
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/* delete trash from RHR*/
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volatile uint32_t fake;
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fake = AT91C_BASE_TWI->TWI_RHR;
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(void)fake;
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/* Initializes driver fields.*/
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i2cp->rxbuf = rxbuf;
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i2cp->rxbytes = rxbytes;
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i2cp->txbuf = NULL;
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i2cp->txbytes = 0;
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/* tune master mode register */
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AT91C_BASE_TWI->TWI_MMR = 0;
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AT91C_BASE_TWI->TWI_MMR |= (addr << 16) | AT91C_TWI_MREAD;
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/* enable just needed interrupts */
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AT91C_BASE_TWI->TWI_IER = AT91C_TWI_RXRDY | AT91C_TWI_NACK;
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/* In single data byte master read or write, the START and STOP must both be set. */
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if (rxbytes == 1)
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_STOP | AT91C_TWI_START;
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else
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_START;
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/* Waits for the operation completion.*/
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i2cp->thread = chThdSelf();
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chSchGoSleepS(THD_STATE_SUSPENDED);
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return chThdSelf()->p_u.rdymsg;
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}
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/**
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* @brief Read data via the I2C bus as master using internal slave addressing.
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* @details Address bytes must be written in special purpose SAM7 registers.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] addr slave device address
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* @param[in] txbuf pointer to the transmit buffer
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* @param[in] txbytes number of bytes to be transmitted
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* @param[out] rxbuf pointer to the receive buffer
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* @param[in] rxbytes number of bytes to be received
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* @param[in] timeout this value is ignored on SAM7 platform.
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*
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* @return The operation status.
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* @retval RDY_OK if the function succeeded.
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* @retval RDY_RESET if one or more I2C errors occurred, the errors can
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* be retrieved using @p i2cGetErrors().
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*
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* @notapi
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*/
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msg_t i2c_lld_transceive_timeout(I2CDriver *i2cp, i2caddr_t addr,
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const uint8_t *txbuf, size_t txbytes,
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uint8_t *rxbuf, size_t rxbytes,
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systime_t timeout) {
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(void)timeout;
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/* delete trash from RHR*/
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volatile uint32_t fake;
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fake = AT91C_BASE_TWI->TWI_RHR;
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(void)fake;
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/* Initializes driver fields.*/
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i2cp->rxbuf = rxbuf;
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i2cp->rxbytes = rxbytes;
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/* tune master mode register */
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AT91C_BASE_TWI->TWI_MMR = 0;
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AT91C_BASE_TWI->TWI_MMR |= (addr << 16) | (txbytes << 8) | AT91C_TWI_MREAD;
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/* store internal slave address in TWI_IADR registers */
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AT91C_BASE_TWI->TWI_IADR = 0;
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while (txbytes > 0){
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AT91C_BASE_TWI->TWI_IADR = (AT91C_BASE_TWI->TWI_IADR << 8);
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AT91C_BASE_TWI->TWI_IADR |= *(txbuf++);
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txbytes--;
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}
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/* enable just needed interrupts */
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AT91C_BASE_TWI->TWI_IER = AT91C_TWI_RXRDY | AT91C_TWI_NACK;
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/* Internal address of I2C slave was set in special Atmel registers.
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* Now we must call read function. The I2C cell automatically sends
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* bytes from IADR register to bus and issues repeated start. */
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if (rxbytes == 1)
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_STOP | AT91C_TWI_START;
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else
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AT91C_BASE_TWI->TWI_CR = AT91C_TWI_START;
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/* Waits for the operation completion.*/
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i2cp->thread = chThdSelf();
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chSchGoSleepS(THD_STATE_SUSPENDED);
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return chThdSelf()->p_u.rdymsg;
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}
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/**
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* @brief Transmits data via the I2C bus as master.
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* @details When performing reading through write you can not write more than
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* 3 bytes of data to I2C slave. This is SAM7 platform limitation.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] addr slave device address
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* @param[in] txbuf pointer to the transmit buffer
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* @param[in] txbytes number of bytes to be transmitted
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* @param[out] rxbuf pointer to the receive buffer
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* @param[in] rxbytes number of bytes to be received
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* @param[in] timeout this value is ignored on SAM7 platform.
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*
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* @return The operation status.
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* @retval RDY_OK if the function succeeded.
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* @retval RDY_RESET if one or more I2C errors occurred, the errors can
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* be retrieved using @p i2cGetErrors().
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*
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* @notapi
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*/
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msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
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const uint8_t *txbuf, size_t txbytes,
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uint8_t *rxbuf, size_t rxbytes,
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systime_t timeout) {
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(void)timeout;
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/* SAM7 specific check */
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chDbgCheck(((rxbytes == 0) ||
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((txbytes > 0) && (txbytes < 4) && (rxbuf != NULL))),
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"i2c_lld_master_transmit_timeout");
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/* prepare to read through write operation */
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if (rxbytes > 0){
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return i2c_lld_transceive_timeout(i2cp, addr, txbuf, txbytes, rxbuf,
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rxbytes, timeout);
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}
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else{
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if (txbytes == 1){
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/* In single data byte master read or write, the START and STOP
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* must both be set. */
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AT91C_BASE_TWI->TWI_CR |= AT91C_TWI_STOP;
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}
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AT91C_BASE_TWI->TWI_MMR = 0;
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AT91C_BASE_TWI->TWI_MMR |= addr << 16;
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/* enable just needed interrupts */
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AT91C_BASE_TWI->TWI_IER = AT91C_TWI_TXRDY | AT91C_TWI_NACK;
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/* correct size and pointer because first byte will be written
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* for issue start condition */
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i2cp->txbuf = txbuf + 1;
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i2cp->txbytes = txbytes - 1;
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/* According to datasheet there is no need to set START manually
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* we just need to write first byte in THR */
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AT91C_BASE_TWI->TWI_THR = txbuf[0];
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/* Waits for the operation completion.*/
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i2cp->thread = chThdSelf();
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chSchGoSleepS(THD_STATE_SUSPENDED);
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return chThdSelf()->p_u.rdymsg;
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}
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}
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#endif /* HAL_USE_I2C */
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/** @} */
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