mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-13 11:44:31 +00:00
139 lines
2.7 KiB
C++
139 lines
2.7 KiB
C++
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __ADC_H__
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#define __ADC_H__
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#include "hal.h"
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namespace lpc43xx {
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namespace adc {
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constexpr size_t clock_rate_max = 4500000U;
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struct CR {
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uint32_t sel;
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uint32_t clkdiv;
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uint32_t resolution;
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uint32_t edge;
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constexpr operator uint32_t() const {
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return
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((sel & 0xff) << 0)
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| ((clkdiv & 0xff) << 8)
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| ((0 & 1) << 16)
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| (((10 - resolution) & 7) << 17)
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| ((1 & 1) << 21)
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| ((0 & 7) << 24)
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| ((edge & 1) << 27)
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;
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}
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};
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struct Config {
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uint32_t cr;
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};
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class ADC {
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public:
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constexpr ADC(
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LPC_ADCx_Type* adcp
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) : adcp(adcp)
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{
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}
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void power_up(const Config config) const {
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adcp->CR = config.cr;
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}
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void clock_enable() const {
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if( adcp == LPC_ADC0 ) {
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LPC_CCU1->CLK_APB3_ADC0_CFG.AUTO = 1;
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LPC_CCU1->CLK_APB3_ADC0_CFG.RUN = 1;
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}
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if( adcp == LPC_ADC1 ) {
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LPC_CCU1->CLK_APB3_ADC1_CFG.AUTO = 1;
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LPC_CCU1->CLK_APB3_ADC1_CFG.RUN = 1;
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}
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}
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void clock_disable() const {
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if( adcp == LPC_ADC0 ) {
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LPC_CCU1->CLK_APB3_ADC0_CFG.RUN = 0;
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}
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if( adcp == LPC_ADC1 ) {
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LPC_CCU1->CLK_APB3_ADC1_CFG.RUN = 0;
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}
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}
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void disable() const {
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adcp->INTEN = 0;
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adcp->CR = 0;
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clock_disable();
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}
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void interrupts_disable() const {
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adcp->INTEN = 0;
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}
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void interrupts_enable(const uint32_t mask) const {
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adcp->INTEN = mask;
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}
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void start_burst() const {
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adcp->CR |= (1U << 16);
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}
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void start_once() const {
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adcp->CR |= (1U << 24);
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}
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void start_once(size_t n) const {
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uint32_t cr = adcp->CR;
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cr &= ~(0xffU);
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cr |= (1 << 24) | (1 << n);
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adcp->CR = cr;
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}
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void stop_burst() const {
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adcp->CR &= ~(1U << 16);
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}
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uint32_t convert(size_t n) const {
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start_once(n);
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while(true) {
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const uint32_t data = adcp->DR[n];
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if( (data >> 31) & 1 ) {
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return (data >> 6) & 0x3ff;
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}
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}
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}
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private:
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LPC_ADCx_Type* const adcp;
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};
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} /* namespace adc */
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} /* namespace lpc43xx */
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#endif/*__ADC_H__*/
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