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https://github.com/portapack-mayhem/mayhem-firmware.git
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abd6177303
* Added CPLD code for H4M * Added CPLD code for H4M * Added CPLD code for H4M * Added CPLD code for H4M * Clean up * Clean up
51 lines
2.4 KiB
Tcl
51 lines
2.4 KiB
Tcl
set AGM_SUPRA true
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set DESIGN "portapack_h4m_cpld"
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set IPLIST {alta_bram alta_bram9k alta_sram alta_wram alta_pll alta_pllx alta_pllv alta_pllve alta_boot alta_osc alta_mult alta_multm alta_ufm alta_ufms alta_ufml alta_i2c alta_spi alta_irda alta_mcu alta_mcu_m3 alta_saradc alta_adc alta_dac alta_cmp }
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lappend IPLIST alta_rv32
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proc set_alta_partition {inst tag} {
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set full_name [get_name_info -observable_type pre_synthesis -info full_path $inst]
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set inst_name [get_name_info -observable_type pre_synthesis -info short_full_path $inst]
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set base_name [get_name_info -observable_type pre_synthesis -info instance_name $inst]
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set section_id [string map { [ _ ] _ . _ | _} $inst_name]
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eval "set_global_assignment -name PARTITION_COLOR 52377 -section_id $section_id -tag $tag"
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eval "set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id $section_id -tag $tag"
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eval "set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id $section_id -tag $tag"
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eval "set_instance_assignment -name PARTITION_HIERARCHY $section_id -to $full_name -section_id $section_id -tag $tag"
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}
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load_package flow
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if { $DESIGN == "" } {
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set DESIGN $::quartus(args)
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}
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project_open $DESIGN
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set tag alta_auto
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if { [llength $IPLIST] > 0 } {
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# A Quartus bug saves PARTITION_HIERARCHY assignments without tag. Use section_id to remove them.
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set asgn_col [get_all_global_assignments -name PARTITION_NETLIST_TYPE -tag $tag]
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foreach_in_collection part $asgn_col {
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set section_id [lindex $part 0]
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eval "remove_all_instance_assignments -name PARTITION_HIERARCHY -section_id $section_id"
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}
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eval "remove_all_global_assignments -name PARTITION_COLOR -tag $tag"
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eval "remove_all_global_assignments -name PARTITION_NETLIST_TYPE -tag $tag"
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eval "remove_all_global_assignments -name PARTITION_FITTER_PRESERVATION_LEVEL -tag $tag"
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catch { execute_module -tool map }
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foreach ip $IPLIST {
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foreach_in_collection inst [get_names -node_type hierarchy -observable_type pre_synthesis -filter "$ip:*"] {
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set_alta_partition $inst $tag
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}
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foreach_in_collection inst [get_names -node_type hierarchy -observable_type pre_synthesis -filter "*|$ip:*"] {
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set_alta_partition $inst $tag
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}
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}
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}
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eval "set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY PARTITION_ONLY -section_id eda_simulation"
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project_close
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exit
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