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234 lines
11 KiB
Plaintext
Executable File
234 lines
11 KiB
Plaintext
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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---
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes ChibiOS/RT, without being obliged to provide
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the source code for any proprietary components. See the file exception.txt
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for full details of how and when the exception can be applied.
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*/
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/**
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* @defgroup ARM ARM7/9
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* @details ARM7/9 port for the GCC compiler.
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*
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* @section ARM_INTRO Introduction
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* The ARM7/9-GCC port supports the ARM7/9 core in the following three modes:
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* - <b>Pure ARM</b> mode, this is the preferred mode for code speed, this
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* mode increases the memory footprint however. This mode is enabled when
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* all the modules are compiled in ARM mode, see the Makefiles.
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* - <b>Pure THUMB</b> mode, this is the preferred mode for code size. In
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* this mode the execution speed is slower than the ARM mode. This mode
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* is enabled when all the modules are compiled in THUMB mode, see the
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* Makefiles.
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* - <b>Interworking</b> mode, when in the system there are ARM modules mixed
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* with THUMB modules then the interworking compiler option is enabled.
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* This is usually the slowest mode and the code size is not as good as
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* in pure THUMB mode.
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* .
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* @section ARM_STATES Mapping of the System States in the ARM7/9 port
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* The ChibiOS/RT logical system states are mapped as follow in the ARM7/9
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* port:
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* - <b>Init</b>. This state is represented by the startup code and the
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* initialization code before @p chSysInit() is executed. It has not a
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* special hardware state associated, usually the CPU goes through several
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* hardware states during the startup phase.
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* - <b>Normal</b>. This is the state the system has after executing
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* @p chSysInit(). In this state the CPU has both the interrupt sources
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* (IRQ and FIQ) enabled and is running in ARM System Mode.
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* - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
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* sources are served, the core is running in ARM System Mode.
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* - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
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* running in ARM System Mode.
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* - <b>Sleep</b>. ARM7/9 cores does not have an explicit built-in low power
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* mode but there are clock stop modes implemented in custom ways by the
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* various silicon vendors. This state is implemented in each microcontroller
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* support code in a different way, the core is running (or freezed...)
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* in ARM System Mode.
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* - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
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* - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
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* that this state is not different from the SRI state in this port, the
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* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
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* order to formally change state because this may change).
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* - <b>Serving Regular Interrupt</b>. IRQ sources disabled, core running in
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* ARM IRQ Mode. See also the I-Locked state.
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* - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
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* in ARM FIQ Mode.
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* - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
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* sources in ARM7/9 architecture but synchronous SVC, ABT and UND exception
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* handlers can be seen as belonging to this category.
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* - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
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* and FIQ sources. The ARM state is whatever the processor was running when
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* @p chSysHalt() was invoked.
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* .
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* @section ARM_NOTES The ARM7/9 port notes
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* The ARM7/9 port is organized as follow:
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* - The @p main() function is invoked in system mode.
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* - Each thread has a private user/system stack, the system has a single
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* interrupt stack where all the interrupts are processed.
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* - The threads are started in system mode.
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* - The threads code can run in system mode or user mode, however the
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* code running in user mode cannot invoke the ChibiOS/RT APIs directly
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* because privileged instructions are used inside.<br>
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* The kernel APIs can be eventually invoked by using a SWI entry point
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* that handles the switch in system mode and the return in user mode.
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* - Other modes are not preempt-able because the system code assumes the
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* threads running in system mode. When running in supervisor or other
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* modes make sure that the interrupts are globally disabled.
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* - Interrupts nesting is not supported in the ARM7/9 port because their
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* implementation, even if possible, is not really efficient in this
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* architecture.
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* - FIQ sources can preempt the kernel (by design) so it is not possible to
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* invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
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* affected by the kernel activity so there is not added jitter.
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* .
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* @section ARM_IH ARM7/9 Interrupt Handlers
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* In the current implementation the ARM7/9 Interrupt handlers do not save
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* function-saved registers so you need to make sure your code saves them
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* or does not use them (this happens because in the ARM7/9 port all the
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* OS interrupt handler functions are declared naked).<br>
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* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
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* system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
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* The easiest way to ensure this is to just invoke a normal function from
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* within the interrupt handler, the function code will save all the required
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* registers.<br>
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* Example:
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* @code
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* CH_IRQ_HANDLER(irq_handler) {
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* CH_IRQ_PROLOGUE();
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*
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* serve_interrupt();
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*
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* VICVectAddr = 0; // This is LPC214x-specific.
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* CH_IRQ_EPILOGUE();
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* }
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* @endcode
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* This is not a bug but an implementation choice, this solution allows to
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* have interrupt handlers compiled in thumb mode without have to use an
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* interworking mode (the mode switch is hidden in the macros), this
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* greatly improves code efficiency and size. You can look at the serial
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* driver for real examples of interrupt handlers.<br>
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* It is important that the serve_interrupt() interrupt function is not
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* inlined by the compiler into the ISR or the code could still modify
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* the unsaved registers, this can be accomplished using GCC by adding
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* the attribute "noinline" to the function:
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* @code
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* #if defined(__GNUC__)
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* __attribute__((noinline))
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* #endif
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* static void serve_interrupt(void) {
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* }
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* @endcode
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* Note that several commercial compilers support a GNU-like functions
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* attribute mechanism.<br>
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* Alternative ways are to use an appropriate pragma directive or disable
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* inlining optimizations in the modules containing the interrupt handlers.
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*
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* @ingroup gcc
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*/
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/**
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* @defgroup ARM_CONF Configuration Options
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* @details ARM7/9 specific configuration options. The ARM7/9 port allows some
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* architecture-specific configurations settings that can be overridden by
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* redefining them in @p chconf.h. Usually there is no need to change the
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* default values.
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* - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
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* by an interrupt handler between the @p extctx and @p intctx
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* structures.<br>
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* In practice this value is the stack space used by the chSchDoReschedule()
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* stack frame.<br>
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* This value can be affected by a variety of external things like compiler
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* version, compiler options, kernel settings (speed/size) and so on.<br>
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* The default for this value is @p 0x10 which should be a safe value, you
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* can trim this down by defining the macro externally. This would save
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* some valuable RAM space for each thread present in the system.<br>
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* The default value is set into <b>./os/ports/GCC/ARM/chcore.h</b>.
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* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
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* thread. Usually there is no need to change this value unless inserting
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* code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
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* - @p ARM_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
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* an implementation-specific clock stop mode from within the idle loop.
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* This option is defaulted to FALSE because it can create problems with
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* some debuggers. Setting this option to TRUE reduces the system power
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* requirements.
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* .
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* @ingroup ARM
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*/
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/**
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* @defgroup ARM_CORE Core Port Implementation
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* @details ARM7/9 specific port code, structures and macros.
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*
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* @ingroup ARM
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*/
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/**
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* @defgroup ARM_STARTUP Startup Support
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* @details ARM7/9 startup code support. ChibiOS/RT provides its own generic
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* startup file for the ARM7/9 port. Of course it is not mandatory to use it
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* but care should be taken about the startup phase details.
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*
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* @section ARM_STARTUP_1 Startup Process
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* The startup process, as implemented, is the following:
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* -# The stacks are initialized by assigning them the sizes defined in the
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* linker script (usually named @p ch.ld). Stack areas are allocated from
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* the highest RAM location downward.
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* -# The ARM state is switched to System with both IRQ and FIQ sources
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* disabled.
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* -# An early initialization routine @p hwinit0 is invoked, if the symbol is
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* not defined then an empty default routine is executed (weak symbol).
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* -# DATA and BSS segments are initialized.
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* -# A late initialization routine @p hwinit1 is invoked, if the symbol not
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* defined then an empty default routine is executed (weak symbol).<br>
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* This late initialization function is also the proper place for a
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* @a bootloader, if your application requires one.
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* -# The @p main() function is invoked with the parameters @p argc and @p argv
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* set to zero.
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* -# Should the @p main() function return a branch is performed to the weak
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* symbol _main_exit_handler. The default code is an endless empty loop.
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* .
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* @section ARM_STARTUP_2 Expected linker symbols
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* The startup code starts at the symbol @p ResetHandler and expects the
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* following symbols to be defined in the linker script:
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* - @p __ram_end__ RAM end location +1.
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* - @p __und_stack_size__ Undefined Instruction stack size.
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* - @p __abt_stack_size__ Memory Abort stack size.
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* - @p __fiq_stack_size__ FIQ service stack size.
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* - @p __irq_stack_size__ IRQ service stack size.
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* - @p __svc_stack_size__ SVC service stack size.
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* - @p __sys_stack_size__ System/User stack size. This is the stack area used
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* by the @p main() function.
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* - @p _textdata address of the data segment source read only data.
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* - @p _data data segment start location.
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* - @p _edata data segment end location +1.
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* - @p _bss_start BSS start location.
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* - @p _bss_end BSS end location +1.
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* .
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* @ingroup ARM
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*/
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/**
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* @defgroup ARM_SPECIFIC Specific Implementations
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* @details Platform-specific port code.
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*
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* @ingroup ARM
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*/
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