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https://github.com/portapack-mayhem/mayhem-firmware.git
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137 lines
4.6 KiB
Plaintext
Executable File
137 lines
4.6 KiB
Plaintext
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @defgroup LPC11xx LPC11xx Drivers
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* @details This section describes all the supported drivers on the LPC11xx
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* platform and the implementation details of the single drivers.
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*
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* @ingroup platforms
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*/
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/**
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* @defgroup LPC11xx_HAL LPC11xx Initialization Support
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* @details The LPC11xx HAL support is responsible for system initialization.
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*
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* @section lpc11xx_hal_1 Supported HW resources
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* - SYSCON.
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* - Flash.
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* .
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* @section lpc11xx_hal_2 LPC11xx HAL driver implementation features
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* - Clock tree initialization.
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* - Clock source selection.
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* - Flash controller initialization.
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* - SYSTICK initialization based on current clock and kernel required rate.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_GPT LPC11xx GPT Support
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* @details The LPC11xx GPT driver uses the CTxxBy peripherals.
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*
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* @section lpc11xx_gpt_1 Supported HW resources
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* - CT16B0.
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* - CT16B1.
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* - CT32B0.
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* - CT32B1.
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* .
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* @section lpc11xx_gpt_2 LPC11xx GPT driver implementation features
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* - Each timer can be independently enabled and programmed. Unused
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* peripherals are left in low power mode.
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* - Programmable CTxxBy interrupts priority level.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_PAL LPC11xx PAL Support
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* @details The LPC11xx PAL driver uses the GPIO peripherals.
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*
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* @section lpc11xx_pal_1 Supported HW resources
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* - GPIO0.
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* - GPIO1.
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* - GPIO2.
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* - GPIO3.
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* .
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* @section lpc11xx_pal_2 LPC11xx PAL driver implementation features
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* - 12 bits wide ports.
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* - Atomic set/reset functions.
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* - Atomic set+reset function (atomic bus operations).
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* - Output latched regardless of the pad setting.
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* - Direct read of input pads regardless of the pad setting.
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* .
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* @section lpc11xx_pal_3 Supported PAL setup modes
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* - @p PAL_MODE_RESET.
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* - @p PAL_MODE_UNCONNECTED.
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* - @p PAL_MODE_INPUT.
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* - @p PAL_MODE_OUTPUT_PUSHPULL.
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* .
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* Any attempt to setup an invalid mode is ignored.
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*
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* @section lpc11xx_pal_4 Suboptimal behavior
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* Some GPIO features are less than optimal:
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* - Pad/port toggling operations are not atomic.
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* - Pull-up and Pull-down resistors cannot be programmed through the PAL
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* driver and must be programmed separately using the IOCON peripheral.
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* - Reading of the output latch for pads programmed as input is not possible,
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* the input pin value is returned instead.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_SERIAL LPC11xx Serial Support
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* @details The LPC11xx Serial driver uses the UART peripheral in a
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* buffered, interrupt driven, implementation. The serial driver
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* also takes advantage of the LPC11xx UARTs deep hardware buffers.
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*
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* @section lpc11xx_serial_1 Supported HW resources
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* The serial driver can support any of the following hardware resources:
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* - UART.
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* .
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* @section lpc11xx_serial_2 LPC11xx Serial driver implementation features
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* - Clock stop for reduced power usage when the driver is in stop state.
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* - Fully interrupt driven.
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* - Programmable priority level.
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* - Takes advantage of the input and output FIFOs.
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* .
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* @ingroup LPC11xx
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*/
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/**
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* @defgroup LPC11xx_SPI LPC11xx SPI Support
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* @details The SPI driver supports the LPC11xx SSP peripherals in an interrupt
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* driven implementation.
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* @note Being the SPI a fast peripheral, much care must be taken to
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* not saturate the CPU bandwidth with an excessive IRQ rate. The
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* maximum transfer bit rate is likely limited by the IRQ
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* handling.
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*
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* @section lpc11xx_spi_1 Supported HW resources
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* - SSP0.
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* - SSP1 (where present).
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* .
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* @section lpc11xx_spi_2 LPC11xx SPI driver implementation features
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* - Clock stop for reduced power usage when the driver is in stop state.
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* - Each SSP can be independently enabled and programmed. Unused
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* peripherals are left in low power mode.
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* - Fully interrupt driven.
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* - Programmable interrupt priority levels for each SSP.
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* .
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* @ingroup LPC11xx
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*/
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