mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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231 lines
9.2 KiB
C
Executable File
231 lines
9.2 KiB
C
Executable File
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file AT91SAM7/gpt_lld.h
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* @brief AT91SAM7 GPT subsystem low level driver header.
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*
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* @addtogroup GPT
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* @{
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*/
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#ifndef _GPT_LLD_H_
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#define _GPT_LLD_H_
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#if HAL_USE_GPT || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief GPTD1 driver enable switch.
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* @details If set to @p TRUE the support for GPTD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(AT91_GPT_USE_TC0) || defined(__DOXYGEN__)
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#define AT91_GPT_USE_TC0 FALSE
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#endif
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/**
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* @brief GPTD2 driver enable switch.
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* @details If set to @p TRUE the support for GPTD2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(AT91_GPT_USE_TC1) || defined(__DOXYGEN__)
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#define AT91_GPT_USE_TC1 FALSE
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#endif
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/**
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* @brief GPTD3 driver enable switch.
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* @details If set to @p TRUE the support for GPTD3 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(AT91_GPT_USE_TC2) || defined(__DOXYGEN__)
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#define AT91_GPT_USE_TC3 FALSE
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#endif
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/**
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* @brief GPTD1 interrupt priority level setting.
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*/
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#if !defined(AT91_GPT_TC0_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define AT91_GPT_TC0_IRQ_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
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#endif
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/**
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* @brief GPTD2 interrupt priority level setting.
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*/
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#if !defined(AT91_GPT_TC1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define AT91_GPT_TC1_IRQ_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
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#endif
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/**
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* @brief GPTD3 interrupt priority level setting.
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*/
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#if !defined(AT91_GPT_TC2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define AT91_GPT_TC2_IRQ_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !AT91_GPT_USE_TC0 && !AT91_GPT_USE_TC1 && !AT91_GPT_USE_TC2
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#error "GPT driver activated but no TC peripheral assigned"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief GPT frequency type.
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*/
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typedef uint32_t gptfreq_t;
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/**
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* @brief GPT counter type.
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*/
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typedef uint16_t gptcnt_t;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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/**
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* @brief Timer clock in Hz.
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* @note The low level can use assertions in order to catch invalid
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* frequency specifications.
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*/
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gptfreq_t frequency;
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/**
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* @brief Timer callback pointer.
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* @note This callback is invoked on GPT counter events.
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*/
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gptcallback_t callback;
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/* End of the mandatory fields.*/
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/**
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* @brief Timer Clock Source.
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*/
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uint8_t clocksource;
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#define GPT_CLOCK_MCLK 0 // @< Internal clock. frequency must = MCLK/2, MCLK/8, MCLK/32, MCLK/128 or MCLK/1024
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#define GPT_CLOCK_FREQUENCY 1 // @< Internal clock. interval is ignored. frequency determines rate
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#define GPT_CLOCK_RE_TCLK0 2 // @< External TCLK0. Rising Edge
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#define GPT_CLOCK_FE_TCLK0 3 // @< External TCLK0. Falling Edge
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#define GPT_CLOCK_RE_TCLK1 4 // @< External TCLK1. Rising Edge
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#define GPT_CLOCK_FE_TCLK1 5 // @< External TCLK1. Falling Edge
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#define GPT_CLOCK_RE_TCLK2 6 // @< External TCLK2. Rising Edge
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#define GPT_CLOCK_FE_TCLK2 7 // @< External TCLK2. Falling Edge
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#define GPT_CLOCK_RE_TC0 8 // @< TC0 output. Rising Edge. Do not use on TC0
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#define GPT_CLOCK_FE_TC0 9 // @< TC0 output. Falling Edge. Do not use on TC0
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#define GPT_CLOCK_RE_TC1 10 // @< TC1 output. Rising Edge. Do not use on TC1
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#define GPT_CLOCK_FE_TC1 11 // @< TC1 output. Falling Edge. Do not use on TC1
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#define GPT_CLOCK_RE_TC2 12 // @< TC2 output. Rising Edge. Do not use on TC2
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#define GPT_CLOCK_FE_TC2 13 // @< TC2 output. Falling Edge. Do not use on TC2
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uint8_t clockgate;
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#define GPT_GATE_NONE 0 // @< Clock gating off
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#define GPT_GATE_TCLK0 1 // @< Clock on TCLK0 active high signal. If using this on TC0 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_GATE_TCLK1 2 // @< Clock on TCLK1 active high signal. If using this on TC1 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_GATE_TCLK2 3 // @< Clock on TCLK2 active high signal. If using this on TC2 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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uint8_t trigger;
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#define GPT_TRIGGER_NONE 0x00 // @< Start immediately
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#define GPT_TRIGGER_RE_TIOB 0x10 // @< Start on TIOB signal. Rising Edge.
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#define GPT_TRIGGER_FE_TIOB 0x20 // @< Start on TIOB signal. Falling Edge.
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#define GPT_TRIGGER_BE_TIOB 0x30 // @< Start on TIOB signal. Both Edges.
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#define GPT_TRIGGER_RE_TCLK0 0x11 // @< Start on TCLK0 signal. Rising Edge. If using this on TC0 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_FE_TCLK0 0x21 // @< Start on TCLK0 signal. Falling Edge. If using this on TC0 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_BE_TCLK0 0x31 // @< Start on TCLK0 signal. Both Edges. If using this on TC0 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_RE_TCLK1 0x12 // @< Start on TCLK1 signal. Rising Edge. If using this on TC1 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_FE_TCLK1 0x22 // @< Start on TCLK1 signal. Falling Edge. If using this on TC1 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_BE_TCLK1 0x32 // @< Start on TCLK1 signal. Both Edges. If using this on TC1 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_RE_TCLK2 0x13 // @< Start on TCLK2 signal. Rising Edge. If using this on TC2 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_FE_TCLK2 0x23 // @< Start on TCLK2 signal. Falling Edge. If using this on TC2 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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#define GPT_TRIGGER_BE_TCLK2 0x33 // @< Start on TCLK2 signal. Both Edges. If using this on TC2 with GPT_CLOCK_xx_TIMx, the TIMx output will be used instead.
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} GPTConfig;
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/**
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* @brief Structure representing a GPT driver.
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*/
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struct GPTDriver {
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/**
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* @brief Driver state.
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*/
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gptstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const GPTConfig *config;
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#if defined(GPT_DRIVER_EXT_FIELDS)
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GPT_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the TCx registers block.
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*/
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AT91S_TC *tc;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if AT91_GPT_USE_TC0 && !defined(__DOXYGEN__)
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extern GPTDriver GPTD1;
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#endif
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#if AT91_GPT_USE_TC1 && !defined(__DOXYGEN__)
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extern GPTDriver GPTD2;
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#endif
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#if AT91_GPT_USE_TC2 && !defined(__DOXYGEN__)
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extern GPTDriver GPTD3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void gpt_lld_init(void);
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void gpt_lld_start(GPTDriver *gptp);
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void gpt_lld_stop(GPTDriver *gptp);
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void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period);
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void gpt_lld_stop_timer(GPTDriver *gptp);
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void gpt_lld_change_interval(GPTDriver *gptp, gptcnt_t interval);
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void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_GPT */
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#endif /* _GPT_LLD_H_ */
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/** @} */
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