mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2024-12-18 14:07:43 +00:00
758 lines
46 KiB
C
Executable File
758 lines
46 KiB
C
Executable File
/*
|
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
you may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.
|
|
*/
|
|
|
|
#ifndef _BOARD_H_
|
|
#define _BOARD_H_
|
|
|
|
/*
|
|
* Setup for STMicroelectronics NUCLEO-F030R8 board.
|
|
*/
|
|
|
|
/*
|
|
* Board identifier.
|
|
*/
|
|
#define BOARD_ST_NUCLEO_F030R8
|
|
#define BOARD_NAME "STMicroelectronics NUCLEO-F030R8"
|
|
|
|
/*
|
|
* Board oscillators-related settings.
|
|
* NOTE: LSE not fitted.
|
|
* NOTE: HSE not fitted.
|
|
*/
|
|
#if !defined(STM32_LSECLK)
|
|
#define STM32_LSECLK 0
|
|
#endif
|
|
|
|
#define STM32_LSEDRV (3 << 3)
|
|
|
|
#if !defined(STM32_HSECLK)
|
|
#define STM32_HSECLK 0
|
|
#endif
|
|
|
|
#define STM32_HSE_BYPASS
|
|
|
|
/*
|
|
* MCU type as defined in the ST header.
|
|
*/
|
|
#define STM32F030
|
|
|
|
/*
|
|
* IO pins assignments.
|
|
*/
|
|
#define GPIOA_PIN0 0
|
|
#define GPIOA_PIN1 1
|
|
#define GPIOA_USART_TX 2
|
|
#define GPIOA_USART_RX 3
|
|
#define GPIOA_PIN4 4
|
|
#define GPIOA_LED_GREEN 5
|
|
#define GPIOA_PIN6 6
|
|
#define GPIOA_PIN7 7
|
|
#define GPIOA_PIN8 8
|
|
#define GPIOA_PIN9 9
|
|
#define GPIOA_PIN10 10
|
|
#define GPIOA_OTG_FS_DM 11
|
|
#define GPIOA_OTG_FS_DP 12
|
|
#define GPIOA_SWDIO 13
|
|
#define GPIOA_SWCLK 14
|
|
#define GPIOA_PIN15 15
|
|
|
|
#define GPIOB_PIN0 0
|
|
#define GPIOB_PIN1 1
|
|
#define GPIOB_PIN2 2
|
|
#define GPIOB_SWO 3
|
|
#define GPIOB_PIN4 4
|
|
#define GPIOB_PIN5 5
|
|
#define GPIOB_PIN6 6
|
|
#define GPIOB_PIN7 7
|
|
#define GPIOB_PIN8 8
|
|
#define GPIOB_PIN9 9
|
|
#define GPIOB_PIN10 10
|
|
#define GPIOB_PIN11 11
|
|
#define GPIOB_PIN12 12
|
|
#define GPIOB_PIN13 13
|
|
#define GPIOB_PIN14 14
|
|
#define GPIOB_PIN15 15
|
|
|
|
#define GPIOC_PIN0 0
|
|
#define GPIOC_PIN1 1
|
|
#define GPIOC_PIN2 2
|
|
#define GPIOC_PIN3 3
|
|
#define GPIOC_PIN4 4
|
|
#define GPIOC_PIN5 5
|
|
#define GPIOC_PIN6 6
|
|
#define GPIOC_PIN7 7
|
|
#define GPIOC_PIN8 8
|
|
#define GPIOC_PIN9 9
|
|
#define GPIOC_PIN10 10
|
|
#define GPIOC_PIN11 11
|
|
#define GPIOC_PIN12 12
|
|
#define GPIOC_BUTTON 13
|
|
#define GPIOC_PIN14 14
|
|
#define GPIOC_PIN15 15
|
|
|
|
#define GPIOD_PIN0 0
|
|
#define GPIOD_PIN1 1
|
|
#define GPIOD_PIN2 2
|
|
#define GPIOD_PIN3 3
|
|
#define GPIOD_PIN4 4
|
|
#define GPIOD_PIN5 5
|
|
#define GPIOD_PIN6 6
|
|
#define GPIOD_PIN7 7
|
|
#define GPIOD_PIN8 8
|
|
#define GPIOD_PIN9 9
|
|
#define GPIOD_PIN10 10
|
|
#define GPIOD_PIN11 11
|
|
#define GPIOD_PIN12 12
|
|
#define GPIOD_PIN13 13
|
|
#define GPIOD_PIN14 14
|
|
#define GPIOD_PIN15 15
|
|
|
|
#define GPIOF_OSC_IN 0
|
|
#define GPIOF_OSC_OUT 1
|
|
#define GPIOF_PIN2 2
|
|
#define GPIOF_PIN3 3
|
|
#define GPIOF_PIN4 4
|
|
#define GPIOF_PIN5 5
|
|
#define GPIOF_PIN6 6
|
|
#define GPIOF_PIN7 7
|
|
#define GPIOF_PIN8 8
|
|
#define GPIOF_PIN9 9
|
|
#define GPIOF_PIN10 10
|
|
#define GPIOF_PIN11 11
|
|
#define GPIOF_PIN12 12
|
|
#define GPIOF_PIN13 13
|
|
#define GPIOF_PIN14 14
|
|
#define GPIOF_PIN15 15
|
|
|
|
/*
|
|
* I/O ports initial setup, this configuration is established soon after reset
|
|
* in the initialization code.
|
|
* Please refer to the STM32 Reference Manual for details.
|
|
*/
|
|
#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
|
|
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
|
|
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
|
|
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
|
|
#define PIN_ODR_LOW(n) (0U << (n))
|
|
#define PIN_ODR_HIGH(n) (1U << (n))
|
|
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
|
|
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
|
|
#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
|
|
#define PIN_OSPEED_10M(n) (1U << ((n) * 2))
|
|
#define PIN_OSPEED_40M(n) (3U << ((n) * 2))
|
|
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
|
|
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
|
|
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
|
|
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
|
|
|
|
/*
|
|
* GPIOA setup:
|
|
*
|
|
* PA0 - PIN0 (input pullup).
|
|
* PA1 - PIN1 (input pullup).
|
|
* PA2 - USART_TX (alternate 1).
|
|
* PA3 - USART_RX (alternate 1).
|
|
* PA4 - PIN4 (input pullup).
|
|
* PA5 - LED_GREEN (output pushpull high).
|
|
* PA6 - PIN6 (input pullup).
|
|
* PA7 - PIN7 (input pullup).
|
|
* PA8 - PIN8 (input pullup).
|
|
* PA9 - PIN9 (input pullup).
|
|
* PA10 - PIN10 (input pullup).
|
|
* PA11 - OTG_FS_DM (alternate 10).
|
|
* PA12 - OTG_FS_DP (alternate 10).
|
|
* PA13 - SWDIO (alternate 0).
|
|
* PA14 - SWCLK (alternate 0).
|
|
* PA15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN1) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_USART_TX) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_USART_RX) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN4) | \
|
|
PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN10) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
|
|
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
|
|
PIN_MODE_INPUT(GPIOA_PIN15))
|
|
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_USART_TX) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_USART_RX) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
|
|
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_40M(GPIOA_PIN0) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN1) | \
|
|
PIN_OSPEED_10M(GPIOA_USART_TX) | \
|
|
PIN_OSPEED_10M(GPIOA_USART_RX) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN4) | \
|
|
PIN_OSPEED_10M(GPIOA_LED_GREEN) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN6) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN7) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN8) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN9) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN10) | \
|
|
PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \
|
|
PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \
|
|
PIN_OSPEED_40M(GPIOA_SWDIO) | \
|
|
PIN_OSPEED_40M(GPIOA_SWCLK) | \
|
|
PIN_OSPEED_40M(GPIOA_PIN15))
|
|
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_USART_TX) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_USART_RX) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
|
|
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
|
|
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
|
|
PIN_PUPDR_PULLUP(GPIOA_PIN15))
|
|
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOA_USART_TX) | \
|
|
PIN_ODR_HIGH(GPIOA_USART_RX) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN4) | \
|
|
PIN_ODR_LOW(GPIOA_LED_GREEN) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
|
|
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
|
|
PIN_ODR_HIGH(GPIOA_SWDIO) | \
|
|
PIN_ODR_HIGH(GPIOA_SWCLK) | \
|
|
PIN_ODR_HIGH(GPIOA_PIN15))
|
|
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOA_USART_TX, 1) | \
|
|
PIN_AFIO_AF(GPIOA_USART_RX, 1) | \
|
|
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOA_LED_GREEN, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN7, 0))
|
|
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
|
|
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
|
|
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
|
|
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
|
|
PIN_AFIO_AF(GPIOA_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOB setup:
|
|
*
|
|
* PB0 - PIN0 (input pullup).
|
|
* PB1 - PIN1 (input pullup).
|
|
* PB2 - PIN2 (input pullup).
|
|
* PB3 - SWO (alternate 0).
|
|
* PB4 - PIN4 (input pullup).
|
|
* PB5 - PIN5 (input pullup).
|
|
* PB6 - PIN6 (input pullup).
|
|
* PB7 - PIN7 (input pullup).
|
|
* PB8 - PIN8 (input pullup).
|
|
* PB9 - PIN9 (input pullup).
|
|
* PB10 - PIN10 (input pullup).
|
|
* PB11 - PIN11 (input pullup).
|
|
* PB12 - PIN12 (input pullup).
|
|
* PB13 - PIN13 (input pullup).
|
|
* PB14 - PIN14 (input pullup).
|
|
* PB15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN2) | \
|
|
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_40M(GPIOB_PIN0) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN1) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN2) | \
|
|
PIN_OSPEED_40M(GPIOB_SWO) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN4) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN5) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN6) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN7) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN8) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN9) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN10) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN11) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN12) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN13) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN14) | \
|
|
PIN_OSPEED_40M(GPIOB_PIN15))
|
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_SWO) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOB_SWO) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN15))
|
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOB_SWO, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
|
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOC setup:
|
|
*
|
|
* PC0 - PIN0 (input pullup).
|
|
* PC1 - PIN1 (input pullup).
|
|
* PC2 - PIN2 (input pullup).
|
|
* PC3 - PIN3 (input pullup).
|
|
* PC4 - PIN4 (input pullup).
|
|
* PC5 - PIN5 (input pullup).
|
|
* PC6 - PIN6 (input pullup).
|
|
* PC7 - PIN7 (input pullup).
|
|
* PC8 - PIN8 (input pullup).
|
|
* PC9 - PIN9 (input pullup).
|
|
* PC10 - PIN10 (input pullup).
|
|
* PC11 - PIN11 (input pullup).
|
|
* PC12 - PIN12 (input pullup).
|
|
* PC13 - BUTTON (input floating).
|
|
* PC14 - PIN14 (input pullup).
|
|
* PC15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOC_BUTTON) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_40M(GPIOC_PIN0) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN1) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN2) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN3) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN4) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN5) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN6) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN7) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN8) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN9) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN10) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN11) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN12) | \
|
|
PIN_OSPEED_40M(GPIOC_BUTTON) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN14) | \
|
|
PIN_OSPEED_40M(GPIOC_PIN15))
|
|
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
|
|
PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
|
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOC_BUTTON) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN7, 0))
|
|
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOC_BUTTON, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOD setup:
|
|
*
|
|
* PD0 - PIN0 (input pullup).
|
|
* PD1 - PIN1 (input pullup).
|
|
* PD2 - PIN2 (input pullup).
|
|
* PD3 - PIN3 (input pullup).
|
|
* PD4 - PIN4 (input pullup).
|
|
* PD5 - PIN5 (input pullup).
|
|
* PD6 - PIN6 (input pullup).
|
|
* PD7 - PIN7 (input pullup).
|
|
* PD8 - PIN8 (input pullup).
|
|
* PD9 - PIN9 (input pullup).
|
|
* PD10 - PIN10 (input pullup).
|
|
* PD11 - PIN11 (input pullup).
|
|
* PD12 - PIN12 (input pullup).
|
|
* PD13 - PIN13 (input pullup).
|
|
* PD14 - PIN14 (input pullup).
|
|
* PD15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_40M(GPIOD_PIN0) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN1) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN2) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN3) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN4) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN5) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN6) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN7) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN8) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN9) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN10) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN11) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN12) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN13) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN14) | \
|
|
PIN_OSPEED_40M(GPIOD_PIN15))
|
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN15))
|
|
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN15))
|
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOD_PIN15, 0))
|
|
|
|
/*
|
|
* GPIOF setup:
|
|
*
|
|
* PF0 - OSC_IN (input floating).
|
|
* PF1 - OSC_OUT (input floating).
|
|
* PF2 - PIN2 (input pullup).
|
|
* PF3 - PIN3 (input pullup).
|
|
* PF4 - PIN4 (input pullup).
|
|
* PF5 - PIN5 (input pullup).
|
|
* PF6 - PIN6 (input pullup).
|
|
* PF7 - PIN7 (input pullup).
|
|
* PF8 - PIN8 (input pullup).
|
|
* PF9 - PIN9 (input pullup).
|
|
* PF10 - PIN10 (input pullup).
|
|
* PF11 - PIN11 (input pullup).
|
|
* PF12 - PIN12 (input pullup).
|
|
* PF13 - PIN13 (input pullup).
|
|
* PF14 - PIN14 (input pullup).
|
|
* PF15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
|
|
PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_2M(GPIOF_OSC_IN) | \
|
|
PIN_OSPEED_2M(GPIOF_OSC_OUT) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN2) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN3) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN4) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN5) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN6) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN7) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN8) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN9) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN10) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN11) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN12) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN13) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN14) | \
|
|
PIN_OSPEED_2M(GPIOF_PIN15))
|
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
|
|
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN15))
|
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
|
|
PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN15))
|
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \
|
|
PIN_AFIO_AF(GPIOF_OSC_OUT, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
|
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
|
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
|
|
|
|
|
#if !defined(_FROM_ASM_)
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
void boardInit(void);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* _FROM_ASM_ */
|
|
|
|
#endif /* _BOARD_H_ */
|