mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
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033c4e9a5b
* Updated style * Updated files * fixed new line * Updated spacing * File fix WIP * Updated to clang 13 * updated comment style * Removed old comment code
249 lines
6.2 KiB
C++
249 lines
6.2 KiB
C++
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __I2S_H__
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#define __I2S_H__
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#include "hal.h"
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#include "utility.hpp"
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namespace lpc43xx {
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namespace i2s {
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enum class WordWidth {
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Bits8 = 0x0,
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Bits16 = 0x1,
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Bits32 = 0x3,
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};
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enum class ClockSelect {
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FractionalDivider = 0x0,
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BaseAudioClkOrExternalMCLK = 0x01,
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OtherMCLK = 0x2,
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};
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struct DAO {
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WordWidth wordwidth;
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uint32_t mono;
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uint32_t stop;
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uint32_t reset;
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uint32_t ws_sel;
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uint32_t ws_halfperiod;
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uint32_t mute;
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constexpr operator uint32_t() const {
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return ((toUType(wordwidth) & 3) << 0) | ((mono & 1) << 2) | ((stop & 1) << 3) | ((reset & 1) << 4) | ((ws_sel & 1) << 5) | ((ws_halfperiod & 0x1ff) << 6) | ((mute & 1) << 15);
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}
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};
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struct DAI {
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WordWidth wordwidth;
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uint32_t mono;
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uint32_t stop;
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uint32_t reset;
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uint32_t ws_sel;
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uint32_t ws_halfperiod;
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constexpr operator uint32_t() const {
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return ((toUType(wordwidth) & 3) << 0) | ((mono & 1) << 2) | ((stop & 1) << 3) | ((reset & 1) << 4) | ((ws_sel & 1) << 5) | ((ws_halfperiod & 0x1ff) << 6);
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}
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};
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struct MCLKRate {
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uint32_t x_divider;
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uint32_t y_divider;
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constexpr operator uint32_t() const {
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return ((y_divider & 0xff) << 0) | ((x_divider & 0xff) << 8);
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}
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};
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struct BitRate {
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uint32_t bitrate;
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constexpr operator uint32_t() const {
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return ((bitrate & 0x3f) << 0);
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}
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};
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struct Mode {
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ClockSelect clksel;
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uint32_t four_pin;
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uint32_t mclk_out_en;
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constexpr operator uint32_t() const {
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return ((toUType(clksel) & 3) << 0) | ((four_pin & 1) << 2) | ((mclk_out_en & 1) << 3);
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}
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};
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struct DMA {
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uint32_t rx_enable;
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uint32_t tx_enable;
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size_t rx_depth;
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size_t tx_depth;
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constexpr operator uint32_t() const {
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return ((rx_enable & 1) << 0) | ((tx_enable & 1) << 1) | ((rx_depth & 0xf) << 8) | ((tx_depth & 0xf) << 16);
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}
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};
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struct ConfigTX {
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uint32_t dao;
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uint32_t txrate;
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uint32_t txbitrate;
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uint32_t txmode;
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uint32_t sck_in_sel;
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};
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struct ConfigRX {
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uint32_t dai;
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uint32_t rxrate;
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uint32_t rxbitrate;
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uint32_t rxmode;
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uint32_t sck_in_sel;
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};
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struct ConfigDMA {
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uint32_t dma1;
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uint32_t dma2;
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};
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static const audio_clock_resources_t audio_clock_resources = {
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.base = {.clk = &LPC_CGU->BASE_AUDIO_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = 0},
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.branch = {.cfg = &LPC_CCU2->CLK_AUDIO_CFG, .stat = &LPC_CCU2->CLK_AUDIO_STAT},
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};
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static const i2s_resources_t i2s_resources = {
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.base = {.clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1)},
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.branch = {.cfg = &LPC_CCU1->CLK_APB1_I2S_CFG, .stat = &LPC_CCU1->CLK_APB1_I2S_STAT},
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.reset = {{.output_index = 52}, {.output_index = 53}},
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};
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template <uint32_t BaseAddress>
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class I2S {
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public:
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static void configure(
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const ConfigTX& config_tx,
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const ConfigRX& config_rx) {
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base_clock_enable(&i2s_resources.base);
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branch_clock_enable(&i2s_resources.branch);
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base_clock_enable(&audio_clock_resources.base);
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branch_clock_enable(&audio_clock_resources.branch);
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if (&p() == LPC_I2S0) {
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peripheral_reset(&i2s_resources.reset[0]);
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}
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if (&p() == LPC_I2S1) {
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peripheral_reset(&i2s_resources.reset[1]);
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}
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reset();
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if (&p() == LPC_I2S0) {
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LPC_CREG->CREG6.I2S0_TX_SCK_IN_SEL = config_tx.sck_in_sel;
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LPC_CREG->CREG6.I2S0_RX_SCK_IN_SEL = config_rx.sck_in_sel;
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}
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if (&p() == LPC_I2S1) {
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LPC_CREG->CREG6.I2S1_TX_SCK_IN_SEL = config_tx.sck_in_sel;
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LPC_CREG->CREG6.I2S1_RX_SCK_IN_SEL = config_rx.sck_in_sel;
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}
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p().DAO = config_tx.dao;
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p().TXRATE = config_tx.txrate;
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p().TXBITRATE = config_tx.txbitrate;
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p().TXMODE = config_tx.txmode;
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p().DAI = config_rx.dai;
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p().RXRATE = config_rx.rxrate;
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p().RXBITRATE = config_rx.rxbitrate;
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p().RXMODE = config_rx.rxmode;
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}
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static void configure(
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const ConfigTX& config_tx,
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const ConfigRX& config_rx,
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const ConfigDMA& config_dma) {
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configure(config_tx, config_rx);
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p().DMA1 = config_dma.dma1;
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p().DMA2 = config_dma.dma2;
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}
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static void shutdown() {
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if (&p() == LPC_I2S0) {
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peripheral_reset(&i2s_resources.reset[0]);
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}
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if (&p() == LPC_I2S1) {
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peripheral_reset(&i2s_resources.reset[1]);
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}
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branch_clock_disable(&audio_clock_resources.branch);
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base_clock_disable(&audio_clock_resources.base);
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branch_clock_disable(&i2s_resources.branch);
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base_clock_disable(&i2s_resources.base);
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}
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static void rx_start() {
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p().DAI &= ~(1U << 3);
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}
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static void rx_stop() {
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p().DAI |= (1U << 3);
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}
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static void tx_start() {
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p().DAO &= ~(1U << 3);
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}
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static void tx_stop() {
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p().DAO |= (1U << 3);
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}
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static void tx_mute() {
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p().DAO |= (1U << 15);
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}
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static void tx_unmute() {
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p().DAO &= ~(1U << 15);
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}
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private:
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static void reset() {
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p().DAO |= (1U << 4);
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p().DAI |= (1U << 4);
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}
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static LPC_I2S_Type& p() {
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return *reinterpret_cast<LPC_I2S_Type*>(BaseAddress);
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}
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};
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using i2s0 = I2S<LPC_I2S0_BASE>;
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using i2s1 = I2S<LPC_I2S1_BASE>;
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} /* namespace i2s */
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} /* namespace lpc43xx */
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#endif /*__I2S_H__*/
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