diff --git a/Boot-Process.md b/Boot-Process.md
index f365a26..431fb12 100644
--- a/Boot-Process.md
+++ b/Boot-Process.md
@@ -2,7 +2,7 @@ The boot process is a bit of madness, but justifiable madness.
 
 ### Overview
 
-The LPC4320 bootloader initializes the Cortex-M4F core to boot from the start of external SPI flash. The M0 core stays in reset. The [bootstrap code](https://github.com/sharebrained/portapack-hackrf/blob/master/firmware/bootstrap/bootstrap.c) runs from SPI flash, on the Cortex-M4F. The bootstrap initializes the Cortex-M0 to execute the application code from SPI flash, then sleeps. The application code copies the baseband code into RAM, configures the Cortex-M4F to run from RAM, then resets the Cortex-M4F to begin baseband execution.
+The LPC4320 bootloader initializes the Cortex-M4F core to boot from the start of external SPI flash. The M0 core stays in reset. The bootstrap code runs from SPI flash, on the Cortex-M4F. The bootstrap initializes the Cortex-M0 to execute the application code from SPI flash, then sleeps. The application code copies the baseband code into RAM, configures the Cortex-M4F to run from RAM, then resets the Cortex-M4F to begin baseband execution.
 
 (TODO: A diagram would be helpful, showing the M4F and M0 activities vs. time.)