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https://github.com/oxen-io/session-android.git
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116 lines
2.7 KiB
ArmAsm
116 lines
2.7 KiB
ArmAsm
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#include "arm_arch.h"
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.text
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.arch armv8-a+crypto
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.global gcm_init_v8
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.type gcm_init_v8,%function
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.align 4
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gcm_init_v8:
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ld1 {v17.2d},[x1] //load H
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movi v16.16b,#0xe1
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ext v3.16b,v17.16b,v17.16b,#8
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shl v16.2d,v16.2d,#57
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ushr v18.2d,v16.2d,#63
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ext v16.16b,v18.16b,v16.16b,#8 //t0=0xc2....01
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dup v17.4s,v17.s[1]
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ushr v19.2d,v3.2d,#63
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sshr v17.4s,v17.4s,#31 //broadcast carry bit
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and v19.16b,v19.16b,v16.16b
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shl v3.2d,v3.2d,#1
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ext v19.16b,v19.16b,v19.16b,#8
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and v16.16b,v16.16b,v17.16b
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orr v3.16b,v3.16b,v19.16b //H<<<=1
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eor v3.16b,v3.16b,v16.16b //twisted H
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st1 {v3.2d},[x0]
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ret
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.size gcm_init_v8,.-gcm_init_v8
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.global gcm_gmult_v8
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.type gcm_gmult_v8,%function
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.align 4
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gcm_gmult_v8:
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ld1 {v17.2d},[x0] //load Xi
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movi v19.16b,#0xe1
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ld1 {v20.2d},[x1] //load twisted H
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shl v19.2d,v19.2d,#57
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#ifndef __ARMEB__
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rev64 v17.16b,v17.16b
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#endif
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ext v21.16b,v20.16b,v20.16b,#8
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mov x3,#0
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ext v3.16b,v17.16b,v17.16b,#8
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mov x12,#0
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eor v21.16b,v21.16b,v20.16b //Karatsuba pre-processing
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mov x2,x0
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b .Lgmult_v8
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.size gcm_gmult_v8,.-gcm_gmult_v8
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.global gcm_ghash_v8
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.type gcm_ghash_v8,%function
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.align 4
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gcm_ghash_v8:
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ld1 {v0.2d},[x0] //load [rotated] Xi
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subs x3,x3,#16
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movi v19.16b,#0xe1
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mov x12,#16
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ld1 {v20.2d},[x1] //load twisted H
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csel x12,xzr,x12,eq
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ext v0.16b,v0.16b,v0.16b,#8
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shl v19.2d,v19.2d,#57
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ld1 {v17.2d},[x2],x12 //load [rotated] inp
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ext v21.16b,v20.16b,v20.16b,#8
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#ifndef __ARMEB__
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rev64 v0.16b,v0.16b
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rev64 v17.16b,v17.16b
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#endif
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eor v21.16b,v21.16b,v20.16b //Karatsuba pre-processing
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ext v3.16b,v17.16b,v17.16b,#8
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b .Loop_v8
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.align 4
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.Loop_v8:
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ext v18.16b,v0.16b,v0.16b,#8
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eor v3.16b,v3.16b,v0.16b //inp^=Xi
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eor v17.16b,v17.16b,v18.16b //v17.16b is rotated inp^Xi
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.Lgmult_v8:
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pmull v0.1q,v20.1d,v3.1d //H.lo·Xi.lo
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eor v17.16b,v17.16b,v3.16b //Karatsuba pre-processing
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pmull2 v2.1q,v20.2d,v3.2d //H.hi·Xi.hi
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subs x3,x3,#16
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pmull v1.1q,v21.1d,v17.1d //(H.lo+H.hi)·(Xi.lo+Xi.hi)
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csel x12,xzr,x12,eq
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ext v17.16b,v0.16b,v2.16b,#8 //Karatsuba post-processing
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eor v18.16b,v0.16b,v2.16b
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eor v1.16b,v1.16b,v17.16b
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ld1 {v17.2d},[x2],x12 //load [rotated] inp
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eor v1.16b,v1.16b,v18.16b
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pmull v18.1q,v0.1d,v19.1d //1st phase
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ins v2.d[0],v1.d[1]
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ins v1.d[1],v0.d[0]
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#ifndef __ARMEB__
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rev64 v17.16b,v17.16b
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#endif
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eor v0.16b,v1.16b,v18.16b
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ext v3.16b,v17.16b,v17.16b,#8
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ext v18.16b,v0.16b,v0.16b,#8 //2nd phase
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pmull v0.1q,v0.1d,v19.1d
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eor v18.16b,v18.16b,v2.16b
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eor v0.16b,v0.16b,v18.16b
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b.hs .Loop_v8
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#ifndef __ARMEB__
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rev64 v0.16b,v0.16b
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#endif
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ext v0.16b,v0.16b,v0.16b,#8
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st1 {v0.2d},[x0] //write out Xi
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ret
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.size gcm_ghash_v8,.-gcm_ghash_v8
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.asciz "GHASH for ARMv8, CRYPTOGAMS by <appro@openssl.org>"
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.align 2
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