mirror of
https://github.com/oxen-io/session-android.git
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d83a3d71bc
Merge in RedPhone // FREEBIE
216 lines
7.2 KiB
ArmAsm
216 lines
7.2 KiB
ArmAsm
@
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@ Copyright (c) 2012 The WebRTC project authors. All Rights Reserved.
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@
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@ Use of this source code is governed by a BSD-style license
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@ that can be found in the LICENSE file in the root of the source
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@ tree. An additional intellectual property rights grant can be found
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@ in the file PATENTS. All contributing project authors may
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@ be found in the AUTHORS file in the root of the source tree.
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@
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@ This file contains the function WebRtcSpl_DownsampleFastNeon(), optimized for
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@ ARM Neon platform. The description header can be found in
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@ signal_processing_library.h
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@
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@ The reference C code is in file downsample_fast.c. Bit-exact.
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#include "webrtc/system_wrappers/interface/asm_defines.h"
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GLOBAL_FUNCTION WebRtcSpl_DownsampleFastNeon
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.align 2
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DEFINE_FUNCTION WebRtcSpl_DownsampleFastNeon
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push {r4-r11}
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cmp r3, #0 @ data_out_length <= 0?
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movle r0, #-1
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ble END
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ldrsh r12, [sp, #44]
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ldr r5, [sp, #40] @ r5: factor
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add r4, r12, #1 @ r4: delay + 1
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sub r3, r3, #1 @ r3: data_out_length - 1
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smulbb r3, r5, r3
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ldr r8, [sp, #32] @ &coefficients[0]
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mov r9, r12 @ Iteration counter for outer loops.
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add r3, r4 @ delay + factor * (out_length-1) +1
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cmp r3, r1 @ data_in_length < endpos?
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movgt r0, #-1
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bgt END
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@ Initializations.
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sub r3, r5, asl #3
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add r11, r0, r12, asl #1 @ &data_in[delay]
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ldr r0, [sp, #36] @ coefficients_length
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add r3, r5 @ endpos - factor * 7
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cmp r0, #0 @ coefficients_length <= 0 ?
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movle r0, #-1
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ble END
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add r8, r0, asl #1 @ &coeffieient[coefficients_length]
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cmp r9, r3
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bge POST_LOOP_ENDPOS @ branch when Iteration < 8 times.
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@
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@ First part, unroll the loop 8 times, with 3 subcases (factor == 2, 4, others)
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@
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mov r4, #-2
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@ Direct program flow to the right channel.
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@ r10 is an offset to &data_in[] in the loop. After an iteration, we need to
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@ move the pointer back to original after advancing 16 bytes by a vld1, and
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@ then move 2 bytes forward to increment one more sample.
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cmp r5, #2
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moveq r10, #-14
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beq LOOP_ENDPOS_FACTOR2 @ Branch when factor == 2
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@ Similar here, for r10, we need to move the pointer back to original after
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@ advancing 32 bytes, then move 2 bytes forward to increment one sample.
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cmp r5, #4
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moveq r10, #-30
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beq LOOP_ENDPOS_FACTOR4 @ Branch when factor == 4
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@ For r10, we need to move the pointer back to original after advancing
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@ (factor * 7 * 2) bytes, then move 2 bytes forward to increment one sample.
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mov r10, r5, asl #4
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rsb r10, #2
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add r10, r5, asl #1
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lsl r5, #1 @ r5 = factor * sizeof(data_in)
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@ The general case (factor != 2 && factor != 4)
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LOOP_ENDPOS_GENERAL:
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@ Initializations.
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vmov.i32 q2, #2048
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vmov.i32 q3, #2048
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sub r7, r8, #2
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sub r12, r0, #1 @ coefficients_length - 1
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sub r1, r11, r12, asl #1 @ &data_in[i - j]
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LOOP_COEFF_LENGTH_GENERAL:
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vld1.16 {d2[], d3[]}, [r7], r4 @ coefficients[j]
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vld1.16 d0[0], [r1], r5 @ data_in[i - j]
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vld1.16 d0[1], [r1], r5 @ data_in[i + factor - j]
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vld1.16 d0[2], [r1], r5 @ data_in[i + factor * 2 - j]
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vld1.16 d0[3], [r1], r5 @ data_in[i + factor * 3 - j]
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vld1.16 d1[0], [r1], r5 @ data_in[i + factor * 4 - j]
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vld1.16 d1[1], [r1], r5 @ data_in[i + factor * 5 - j]
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vld1.16 d1[2], [r1], r5 @ data_in[i + factor * 6 - j]
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vld1.16 d1[3], [r1], r10 @ data_in[i + factor * 7 - j]
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subs r12, #1
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vmlal.s16 q2, d0, d2
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vmlal.s16 q3, d1, d3
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bge LOOP_COEFF_LENGTH_GENERAL
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@ Shift, saturate, and store the result.
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vqshrn.s32 d0, q2, #12
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vqshrn.s32 d1, q3, #12
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vst1.16 {d0, d1}, [r2]!
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add r11, r5, asl #3 @ r11 -> &data_in[i + factor * 8]
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add r9, r5, asl #2 @ Counter i = delay + factor * 8.
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cmp r9, r3 @ i < endpos - factor * 7 ?
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blt LOOP_ENDPOS_GENERAL
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asr r5, #1 @ Restore r5 to the value of factor.
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b POST_LOOP_ENDPOS
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@ The case for factor == 2.
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LOOP_ENDPOS_FACTOR2:
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@ Initializations.
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vmov.i32 q2, #2048
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vmov.i32 q3, #2048
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sub r7, r8, #2
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sub r12, r0, #1 @ coefficients_length - 1
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sub r1, r11, r12, asl #1 @ &data_in[i - j]
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LOOP_COEFF_LENGTH_FACTOR2:
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vld1.16 {d16[], d17[]}, [r7], r4 @ coefficients[j]
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vld2.16 {d0, d1}, [r1]! @ data_in[]
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vld2.16 {d2, d3}, [r1], r10 @ data_in[]
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subs r12, #1
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vmlal.s16 q2, d0, d16
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vmlal.s16 q3, d2, d17
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bge LOOP_COEFF_LENGTH_FACTOR2
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@ Shift, saturate, and store the result.
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vqshrn.s32 d0, q2, #12
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vqshrn.s32 d1, q3, #12
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vst1.16 {d0, d1}, [r2]!
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add r11, r5, asl #4 @ r11 -> &data_in[i + factor * 8]
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add r9, r5, asl #3 @ Counter i = delay + factor * 8.
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cmp r9, r3 @ i < endpos - factor * 7 ?
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blt LOOP_ENDPOS_FACTOR2
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b POST_LOOP_ENDPOS
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@ The case for factor == 4.
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LOOP_ENDPOS_FACTOR4:
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@ Initializations.
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vmov.i32 q2, #2048
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vmov.i32 q3, #2048
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sub r7, r8, #2
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sub r12, r0, #1 @ coefficients_length - 1
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sub r1, r11, r12, asl #1 @ &data_in[i - j]
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LOOP_COEFF_LENGTH_FACTOR4:
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vld1.16 {d16[], d17[]}, [r7], r4 @ coefficients[j]
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vld4.16 {d0, d1, d2, d3}, [r1]! @ data_in[]
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vld4.16 {d18, d19, d20, d21}, [r1], r10 @ data_in[]
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subs r12, #1
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vmlal.s16 q2, d0, d16
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vmlal.s16 q3, d18, d17
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bge LOOP_COEFF_LENGTH_FACTOR4
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add r11, r5, asl #4 @ r11 -> &data_in[i + factor * 8]
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add r9, r5, asl #3 @ Counter i = delay + factor * 8.
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@ Shift, saturate, and store the result.
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vqshrn.s32 d0, q2, #12
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vqshrn.s32 d1, q3, #12
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cmp r9, r3 @ i < endpos - factor * 7 ?
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vst1.16 {d0, d1}, [r2]!
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blt LOOP_ENDPOS_FACTOR4
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@
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@ Second part, do the rest iterations (if any).
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@
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POST_LOOP_ENDPOS:
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add r3, r5, asl #3
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sub r3, r5 @ Restore r3 to endpos.
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cmp r9, r3
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movge r0, #0
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bge END
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LOOP2_ENDPOS:
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@ Initializations.
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mov r7, r8
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sub r12, r0, #1 @ coefficients_length - 1
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sub r6, r11, r12, asl #1 @ &data_in[i - j]
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mov r1, #2048
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LOOP2_COEFF_LENGTH:
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ldrsh r4, [r7, #-2]! @ coefficients[j]
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ldrsh r10, [r6], #2 @ data_in[i - j]
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smlabb r1, r4, r10, r1
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subs r12, #1
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bge LOOP2_COEFF_LENGTH
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@ Shift, saturate, and store the result.
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ssat r1, #16, r1, asr #12
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strh r1, [r2], #2
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add r11, r5, asl #1 @ r11 -> &data_in[i + factor]
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add r9, r5 @ Counter i = delay + factor.
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cmp r9, r3 @ i < endpos?
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blt LOOP2_ENDPOS
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mov r0, #0
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END:
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pop {r4-r11}
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bx lr
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