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452 lines
12 KiB
Perl
Executable File
452 lines
12 KiB
Perl
Executable File
#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. Rights for redistribution and usage in source and binary
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# forms are granted according to the OpenSSL license.
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# ====================================================================
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#
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# sha256/512_block procedure for x86_64.
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#
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# 40% improvement over compiler-generated code on Opteron. On EM64T
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# sha256 was observed to run >80% faster and sha512 - >40%. No magical
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# tricks, just straight implementation... I really wonder why gcc
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# [being armed with inline assembler] fails to generate as fast code.
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# The only thing which is cool about this module is that it's very
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# same instruction sequence used for both SHA-256 and SHA-512. In
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# former case the instructions operate on 32-bit operands, while in
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# latter - on 64-bit ones. All I had to do is to get one flavor right,
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# the other one passed the test right away:-)
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#
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# sha256_block runs in ~1005 cycles on Opteron, which gives you
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# asymptotic performance of 64*1000/1005=63.7MBps times CPU clock
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# frequency in GHz. sha512_block runs in ~1275 cycles, which results
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# in 128*1000/1275=100MBps per GHz. Is there room for improvement?
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# Well, if you compare it to IA-64 implementation, which maintains
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# X[16] in register bank[!], tends to 4 instructions per CPU clock
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# cycle and runs in 1003 cycles, 1275 is very good result for 3-way
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# issue Opteron pipeline and X[16] maintained in memory. So that *if*
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# there is a way to improve it, *then* the only way would be to try to
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# offload X[16] updates to SSE unit, but that would require "deeper"
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# loop unroll, which in turn would naturally cause size blow-up, not
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# to mention increased complexity! And once again, only *if* it's
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# actually possible to noticeably improve overall ILP, instruction
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# level parallelism, on a given CPU implementation in this case.
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#
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# Special note on Intel EM64T. While Opteron CPU exhibits perfect
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# perfromance ratio of 1.5 between 64- and 32-bit flavors [see above],
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# [currently available] EM64T CPUs apparently are far from it. On the
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# contrary, 64-bit version, sha512_block, is ~30% *slower* than 32-bit
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# sha256_block:-( This is presumably because 64-bit shifts/rotates
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# apparently are not atomic instructions, but implemented in microcode.
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$flavour = shift;
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$output = shift;
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if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
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$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
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die "can't locate x86_64-xlate.pl";
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open OUT,"| \"$^X\" $xlate $flavour $output";
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*STDOUT=*OUT;
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if ($output =~ /512/) {
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$func="sha512_block_data_order";
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$TABLE="K512";
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$SZ=8;
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@ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%rax","%rbx","%rcx","%rdx",
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"%r8", "%r9", "%r10","%r11");
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($T1,$a0,$a1,$a2)=("%r12","%r13","%r14","%r15");
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@Sigma0=(28,34,39);
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@Sigma1=(14,18,41);
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@sigma0=(1, 8, 7);
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@sigma1=(19,61, 6);
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$rounds=80;
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} else {
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$func="sha256_block_data_order";
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$TABLE="K256";
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$SZ=4;
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@ROT=($A,$B,$C,$D,$E,$F,$G,$H)=("%eax","%ebx","%ecx","%edx",
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"%r8d","%r9d","%r10d","%r11d");
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($T1,$a0,$a1,$a2)=("%r12d","%r13d","%r14d","%r15d");
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@Sigma0=( 2,13,22);
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@Sigma1=( 6,11,25);
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@sigma0=( 7,18, 3);
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@sigma1=(17,19,10);
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$rounds=64;
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}
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$ctx="%rdi"; # 1st arg
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$round="%rdi"; # zaps $ctx
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$inp="%rsi"; # 2nd arg
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$Tbl="%rbp";
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$_ctx="16*$SZ+0*8(%rsp)";
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$_inp="16*$SZ+1*8(%rsp)";
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$_end="16*$SZ+2*8(%rsp)";
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$_rsp="16*$SZ+3*8(%rsp)";
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$framesz="16*$SZ+4*8";
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sub ROUND_00_15()
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{ my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
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$code.=<<___;
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ror \$`$Sigma1[2]-$Sigma1[1]`,$a0
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mov $f,$a2
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mov $T1,`$SZ*($i&0xf)`(%rsp)
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ror \$`$Sigma0[2]-$Sigma0[1]`,$a1
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xor $e,$a0
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xor $g,$a2 # f^g
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ror \$`$Sigma1[1]-$Sigma1[0]`,$a0
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add $h,$T1 # T1+=h
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xor $a,$a1
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add ($Tbl,$round,$SZ),$T1 # T1+=K[round]
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and $e,$a2 # (f^g)&e
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mov $b,$h
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ror \$`$Sigma0[1]-$Sigma0[0]`,$a1
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xor $e,$a0
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xor $g,$a2 # Ch(e,f,g)=((f^g)&e)^g
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xor $c,$h # b^c
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xor $a,$a1
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add $a2,$T1 # T1+=Ch(e,f,g)
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mov $b,$a2
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ror \$$Sigma1[0],$a0 # Sigma1(e)
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and $a,$h # h=(b^c)&a
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and $c,$a2 # b&c
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ror \$$Sigma0[0],$a1 # Sigma0(a)
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add $a0,$T1 # T1+=Sigma1(e)
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add $a2,$h # h+=b&c (completes +=Maj(a,b,c)
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add $T1,$d # d+=T1
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add $T1,$h # h+=T1
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lea 1($round),$round # round++
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add $a1,$h # h+=Sigma0(a)
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___
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}
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sub ROUND_16_XX()
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{ my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;
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$code.=<<___;
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mov `$SZ*(($i+1)&0xf)`(%rsp),$a0
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mov `$SZ*(($i+14)&0xf)`(%rsp),$a1
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mov $a0,$T1
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mov $a1,$a2
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ror \$`$sigma0[1]-$sigma0[0]`,$T1
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xor $a0,$T1
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shr \$$sigma0[2],$a0
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ror \$$sigma0[0],$T1
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xor $T1,$a0 # sigma0(X[(i+1)&0xf])
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mov `$SZ*(($i+9)&0xf)`(%rsp),$T1
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ror \$`$sigma1[1]-$sigma1[0]`,$a2
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xor $a1,$a2
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shr \$$sigma1[2],$a1
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ror \$$sigma1[0],$a2
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add $a0,$T1
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xor $a2,$a1 # sigma1(X[(i+14)&0xf])
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add `$SZ*($i&0xf)`(%rsp),$T1
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mov $e,$a0
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add $a1,$T1
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mov $a,$a1
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___
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&ROUND_00_15(@_);
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}
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$code=<<___;
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.text
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.globl $func
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.type $func,\@function,4
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.align 16
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$func:
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push %rbx
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push %rbp
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push %r12
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push %r13
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push %r14
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push %r15
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mov %rsp,%r11 # copy %rsp
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shl \$4,%rdx # num*16
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sub \$$framesz,%rsp
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lea ($inp,%rdx,$SZ),%rdx # inp+num*16*$SZ
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and \$-64,%rsp # align stack frame
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mov $ctx,$_ctx # save ctx, 1st arg
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mov $inp,$_inp # save inp, 2nd arh
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mov %rdx,$_end # save end pointer, "3rd" arg
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mov %r11,$_rsp # save copy of %rsp
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.Lprologue:
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lea $TABLE(%rip),$Tbl
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mov $SZ*0($ctx),$A
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mov $SZ*1($ctx),$B
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mov $SZ*2($ctx),$C
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mov $SZ*3($ctx),$D
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mov $SZ*4($ctx),$E
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mov $SZ*5($ctx),$F
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mov $SZ*6($ctx),$G
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mov $SZ*7($ctx),$H
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jmp .Lloop
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.align 16
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.Lloop:
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xor $round,$round
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___
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for($i=0;$i<16;$i++) {
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$code.=" mov $SZ*$i($inp),$T1\n";
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$code.=" mov @ROT[4],$a0\n";
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$code.=" mov @ROT[0],$a1\n";
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$code.=" bswap $T1\n";
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&ROUND_00_15($i,@ROT);
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unshift(@ROT,pop(@ROT));
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}
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$code.=<<___;
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jmp .Lrounds_16_xx
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.align 16
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.Lrounds_16_xx:
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___
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for(;$i<32;$i++) {
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&ROUND_16_XX($i,@ROT);
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unshift(@ROT,pop(@ROT));
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}
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$code.=<<___;
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cmp \$$rounds,$round
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jb .Lrounds_16_xx
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mov $_ctx,$ctx
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lea 16*$SZ($inp),$inp
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add $SZ*0($ctx),$A
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add $SZ*1($ctx),$B
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add $SZ*2($ctx),$C
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add $SZ*3($ctx),$D
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add $SZ*4($ctx),$E
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add $SZ*5($ctx),$F
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add $SZ*6($ctx),$G
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add $SZ*7($ctx),$H
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cmp $_end,$inp
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mov $A,$SZ*0($ctx)
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mov $B,$SZ*1($ctx)
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mov $C,$SZ*2($ctx)
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mov $D,$SZ*3($ctx)
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mov $E,$SZ*4($ctx)
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mov $F,$SZ*5($ctx)
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mov $G,$SZ*6($ctx)
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mov $H,$SZ*7($ctx)
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jb .Lloop
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mov $_rsp,%rsi
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mov (%rsi),%r15
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mov 8(%rsi),%r14
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mov 16(%rsi),%r13
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mov 24(%rsi),%r12
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mov 32(%rsi),%rbp
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mov 40(%rsi),%rbx
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lea 48(%rsi),%rsp
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.Lepilogue:
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ret
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.size $func,.-$func
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___
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if ($SZ==4) {
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$code.=<<___;
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.align 64
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.type $TABLE,\@object
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$TABLE:
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.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
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.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
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.long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
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.long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
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.long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
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.long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
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.long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
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.long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
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.long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
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.long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
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.long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
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.long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
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.long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
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.long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
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.long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
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.long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
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___
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} else {
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$code.=<<___;
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.align 64
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.type $TABLE,\@object
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$TABLE:
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.quad 0x428a2f98d728ae22,0x7137449123ef65cd
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.quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
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.quad 0x3956c25bf348b538,0x59f111f1b605d019
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.quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
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.quad 0xd807aa98a3030242,0x12835b0145706fbe
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.quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
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.quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
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.quad 0x9bdc06a725c71235,0xc19bf174cf692694
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.quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
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.quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
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.quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
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.quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
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.quad 0x983e5152ee66dfab,0xa831c66d2db43210
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.quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
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.quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
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.quad 0x06ca6351e003826f,0x142929670a0e6e70
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.quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
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.quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
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.quad 0x650a73548baf63de,0x766a0abb3c77b2a8
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.quad 0x81c2c92e47edaee6,0x92722c851482353b
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.quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
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.quad 0xc24b8b70d0f89791,0xc76c51a30654be30
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.quad 0xd192e819d6ef5218,0xd69906245565a910
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.quad 0xf40e35855771202a,0x106aa07032bbd1b8
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.quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
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.quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
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.quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
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.quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
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.quad 0x748f82ee5defb2fc,0x78a5636f43172f60
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.quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
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.quad 0x90befffa23631e28,0xa4506cebde82bde9
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.quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
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.quad 0xca273eceea26619c,0xd186b8c721c0c207
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.quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
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.quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
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.quad 0x113f9804bef90dae,0x1b710b35131c471b
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.quad 0x28db77f523047d84,0x32caab7b40c72493
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.quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
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.quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
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.quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
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___
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}
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# EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
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# CONTEXT *context,DISPATCHER_CONTEXT *disp)
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if ($win64) {
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$rec="%rcx";
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$frame="%rdx";
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$context="%r8";
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$disp="%r9";
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$code.=<<___;
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.extern __imp_RtlVirtualUnwind
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.type se_handler,\@abi-omnipotent
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.align 16
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se_handler:
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push %rsi
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push %rdi
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push %rbx
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push %rbp
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push %r12
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push %r13
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push %r14
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push %r15
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pushfq
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sub \$64,%rsp
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mov 120($context),%rax # pull context->Rax
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mov 248($context),%rbx # pull context->Rip
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lea .Lprologue(%rip),%r10
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cmp %r10,%rbx # context->Rip<.Lprologue
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jb .Lin_prologue
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mov 152($context),%rax # pull context->Rsp
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lea .Lepilogue(%rip),%r10
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cmp %r10,%rbx # context->Rip>=.Lepilogue
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jae .Lin_prologue
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mov 16*$SZ+3*8(%rax),%rax # pull $_rsp
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lea 48(%rax),%rax
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mov -8(%rax),%rbx
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mov -16(%rax),%rbp
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mov -24(%rax),%r12
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mov -32(%rax),%r13
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mov -40(%rax),%r14
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mov -48(%rax),%r15
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mov %rbx,144($context) # restore context->Rbx
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mov %rbp,160($context) # restore context->Rbp
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mov %r12,216($context) # restore context->R12
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mov %r13,224($context) # restore context->R13
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mov %r14,232($context) # restore context->R14
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mov %r15,240($context) # restore context->R15
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.Lin_prologue:
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mov 8(%rax),%rdi
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mov 16(%rax),%rsi
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mov %rax,152($context) # restore context->Rsp
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mov %rsi,168($context) # restore context->Rsi
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mov %rdi,176($context) # restore context->Rdi
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mov 40($disp),%rdi # disp->ContextRecord
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mov $context,%rsi # context
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mov \$154,%ecx # sizeof(CONTEXT)
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.long 0xa548f3fc # cld; rep movsq
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mov $disp,%rsi
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xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
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mov 8(%rsi),%rdx # arg2, disp->ImageBase
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mov 0(%rsi),%r8 # arg3, disp->ControlPc
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mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
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mov 40(%rsi),%r10 # disp->ContextRecord
|
|
lea 56(%rsi),%r11 # &disp->HandlerData
|
|
lea 24(%rsi),%r12 # &disp->EstablisherFrame
|
|
mov %r10,32(%rsp) # arg5
|
|
mov %r11,40(%rsp) # arg6
|
|
mov %r12,48(%rsp) # arg7
|
|
mov %rcx,56(%rsp) # arg8, (NULL)
|
|
call *__imp_RtlVirtualUnwind(%rip)
|
|
|
|
mov \$1,%eax # ExceptionContinueSearch
|
|
add \$64,%rsp
|
|
popfq
|
|
pop %r15
|
|
pop %r14
|
|
pop %r13
|
|
pop %r12
|
|
pop %rbp
|
|
pop %rbx
|
|
pop %rdi
|
|
pop %rsi
|
|
ret
|
|
.size se_handler,.-se_handler
|
|
|
|
.section .pdata
|
|
.align 4
|
|
.rva .LSEH_begin_$func
|
|
.rva .LSEH_end_$func
|
|
.rva .LSEH_info_$func
|
|
|
|
.section .xdata
|
|
.align 8
|
|
.LSEH_info_$func:
|
|
.byte 9,0,0,0
|
|
.rva se_handler
|
|
___
|
|
}
|
|
|
|
$code =~ s/\`([^\`]*)\`/eval $1/gem;
|
|
print $code;
|
|
close STDOUT;
|