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Fix clock configuration for M4.

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M0 launches baseband, so M4 clock can be set to PLL1. Provide a way to configure that per project, set to correct values for baseband project.
This commit is contained in:
Jared Boone
2015-08-14 12:21:49 -07:00
parent 66320c39d4
commit 4e0de9c4ad
2 changed files with 6 additions and 2 deletions
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4
firmware/baseband/mcuconf.h
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@@ -41,3 +41,7 @@
//#define LPC_ADC1_IRQ_PRIORITY 4
#define LPC43XX_M0APPTXEVENT_IRQ_PRIORITY 4
/* M4 is initialized by M0, which has already started PLL1 */
#define LPC43XX_M4_CLK 200000000
#define LPC43XX_M4_CLK_SRC 0x09