Commit Graph

779 Commits

Author SHA1 Message Date
Erwin Ried
4aaac8545b
Pocsag improvements (#20)
* Update analog_audio_app.cpp (#353)

* Adding phase field (extracted from @jamesshao8 repo)
2020-05-09 13:13:21 +02:00
Erwin Ried
d17130092c
Merge branch 'master' into gps-sim 2020-04-20 10:51:20 +02:00
Erwin Ried
e43f814861
Analog tv app (#334)
* Analog TV app (PAL)

* Icon on main menu

* Analog TV should be yellow

Works for PAL only know, it would be nice to add NTSC in the future, or some customizable sync
2020-04-20 06:50:24 +02:00
Erwin Ried
40531e9230
Ble receiver (#337)
* BLE app

* Update ui_navigation.cpp

Co-authored-by: Furrtek <furrtek@gmail.com>
2020-04-20 06:50:03 +02:00
Erwin Ried
d95bda65ce
Nrf24l01 demodulation (#338)
* NRF demodulation

* Update ui_navigation.cpp
2020-04-20 06:45:28 +02:00
Erwin Ried
aa2eb86ae9 GPS Sim 2020-04-18 01:17:01 +02:00
KimIV
127a7982c3
Update tpms_packet.cpp (#309)
I experimented with my sensors from a Ford Kuga. For data verification I used the Autel MaxiTPMS TS508 device.
2020-02-27 05:54:27 +01:00
Ziggy
b690165da3 UI Redesign for Portapack-Havoc (#268)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Setup: Format clock reference frequency in MHz, not Hz.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.

* Pin config: VREGMODE=1, add other pins for completeness, comment detail

* Pin setup: More useful comments.

* Pin setup: Change some defaults, only set up PortaPack pins if detected.

* Pin setup: Disable LPC pull-ups on PP CPLD data bus, as CPLD is pulling up.

* Baseband: Allow larger HackRF firmware image.

* HackRF: Remove USER_INTERFACE CMake variable.

* CPLD: Make use of HackRF CPLD tool to generate code.

* Release: Add generation of MD5SUMS, SHA256SUMS during "make release"

* Clock generator: Match clock output currents to HackRF firmware.

Someday, we will share a code base again...

* CMake: Make "firmware" target part of the "all" target.

So now an unqualified "make" will make the firmware binary.

* CMake: Change how HackRF firmware is incorporated into binary.

Use the separate HackRF "RAM" binary. Get rid of the strip-dfu utility, since there's no longer a need to extract the binary from the DFU.

* CMake: Renamed GIT_REVISION* -> GIT_VERSION* to match HackRF build env.

* CMake: Bring git version handling closer to HackRF for code reuse.

* Travis-CI: Rework CI release artifact output.

* Travis-CI: Don't assign PROJECT_NAME within deploy-nightly.sh

* Travis-CI: Oops, don't include distro package for compiler...

...when also installing it from a third-party PPA.

* Travis-CI: Update GCC package, old one seems "retired"?

* Travis-CI: OK, the gcc-arm-none-eabi package is NOT current. Undoing...

* Travis-CI: Path oopsies.

* Travis-CI: More path confusion. I think this will do it. *touch wood*

* Travis-CI: Update build message sent to FreeNode #portapack IRC.

* Travis-CI: Break out BUILD_DATE from BUILD_NAME.

* Travis-CI: Introduce build directories, include MD5 and SHA256 hashes.

* Travis-CI: Fix MD5SUMS/SHA256SUMS paths.

* Travis-CI: Fix typo generating name for binary links.

* Power: Keep 1V8 off until after VAA is brought up.

* Power: Bring up VAA in several steps to keep voltage swing small.

* About: Show longer commit/tag version string.

* Versioning: Report non-CI builds with "local-" version prefix.

* Travis-CI: Report new nightly build site in IRC notification.

* Change use of GIT_VERSION to VERSION_STRING
Required by prior merge.

* Git: add "hackrf" submodule.

* CMake: Use hackrf submodule for build, stop pulling during build.

* Travis: Fix build paths due to CMake submodule changes.

* Travis: Explicitly update submodules recursively

* Revert "Travis: Explicitly update submodules recursively"

This reverts commit b246438d805f431e727e01b7407540e932e89ee1.

* Travis: Try to sort out hackrf submodule output paths...

* Travis: I don't know what I'm doing.

* CMake: "make firmware" problem due to target vs. path used for dependency.

* HackRF: Incorporate YAML security fix.

* CMake: Fix more places where targets should be used...

...instead of paths to outputs.

* CMake: Add DFU file to "make firmware" outputs

* HackRF: Update submodule for CMake m0_bin.s path fix.

* added encoder support to alphanum

* added encoder support to freq-keypad

* UI Redesign -
added BtnGrid & NewButton widgets and created a new button-based
layout, with both encoder and touchscreen are supported.

* Scanner changes:
- using SCANNER.TXT for frequencies, ranges also supported. file
format is the same as any other frequency file, thus can be edited
via the Frequency Manager.
- add nfm bw selector & time-to-wait to the UI
- add SCANNER.TXT to sdcard dir

orignal idea & scanner file adopted from user 'bicurico'

* small changes to scanner

* remember last category on frequency manager

* fix: cast int16_t instead of uint16_t (although i doubt we will
have more than 32767 buttons in the array...)

* added a missing last_category_id on freq manager
2019-10-29 22:53:54 +01:00
Tyler Roussos
9f587e6085 Fix Issue 88, Wrong Longitude in ADSB RX (#242) 2019-05-21 16:44:14 +01:00
furrtek
b1e72c788b Added RFM69 helper
LGE tool: new frames
Text entry string length bugfix
2019-05-05 00:43:36 +01:00
furrtek
162cb4c9fa Added LGE app, nothing to see here
Update button in signal gen now works for shape change
2019-02-06 17:34:53 +00:00
Jared Boone
e7c0fa394b PortaPack Sync, take 2 (#215)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* PCB: Change PCB stackup, Tg, clarify solder mask color, use more metric.

* PCB: Move HackRF header P9 to B.CrtYd layer.

* PCB: Change a Tg reference I missed.

* PCB: Update footprints for parts with mismatched CAD->tape rotation.
Adjust a few layer choice and line thickness bits.

* PCB: Got cold feet, switched back to rectangular pads.

* PCB: Add Eco layers to be visible and Gerber output.

* PCB: Use aux origin for plotting, for tidier coordinates.

* PCB: Output Gerber job file, because why not?

* Schematic: Correct footprints for two reference-related components.

* Schematic: Remove manfuacturer and part number for DNP component.

* Schematic: Specify resistor value, manufacturer, part number for reference oscillator series termination.

* PCB: Update netlist and footprints from schematic.

* Netlist: Updated component values, footprints.

* PCB: Nudge some components and traces to address DRC clearance violations.

* PCB: Allow KiCad to update zone timestamps (again?!).

* PCB: Generate *all* Gerber layers.

* Schematic, PCB: Update revision to 20181025.

* PCB: Adjust fab layer annotations orientation and font size.

* PCB: Hide mounting hole reference designators on silk layer.

* PCB: Shrink U1, U3 pads to get 0.2mm space between pads.

* PCB: Set pad-to-mask clearance to zero, leave up to fab. Set minimum mask web to 0.2mm for non-black options.

* PCB: Revise U1 pad shape, mask, paste, thermal drills.
Clearance is improved at corner pads.

* PCB: Tweak U3 for better thermal pad/drill/mask/paste design.

* PCB: Change solder mask color to blue.

* Schematic, PCB: Update revision to 20181029.

* PCB: Bump minimum mask web down a tiny bit because KiCad is having trouble with math.

* Update schematic

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Clock Manager: Actually store chosen clock reference

Similarly-named local was covering a member and discarding the value.

* Clock Manager: Reference type which contains source, frequency.

* Setup: Display reference source, frequency in frequency correction screen.

* LPC43xx API: Add extern "C" for use from C++.

* Use LPC43xx API for SGPIO, GPDMA, I2S initialization.

* I2S: Add BASE_AUDIO_CLK management.

* Add MOTOCON_PWM clock/reset structure.

* Serial: Fix dumb typos.

* Serial: Remove extra reference operator.

* Serial: Cut-and-paste error in structure type name.

* Move SCU structure from PAL to LPC43xx API.

It'd be nice if I gave some thought to where code should live before I commit it.

* VAA power: Move code to HackRF board file

It doesn't belong in PAL.

* MAX5 CPLD: Add SAMPLE and EXTEST methods.

* Flash image: Change packing scheme to use flash more efficiently.

Application is now a single image for both M4 bootstrap and M0.
Baseband images come immediately after application binary. No need to align to large blocks (and waste lots of flash).

* Clock Manager: Remove PLL1 power down function.

* Move and rename peripherals reset function to board module.

* Remove unused peripheral/clock management.

* Clock Manager: Extract switch to IRC into separate function.

* Clock Manager: More explicit shutdown of clocks, clock generator.

* Move initialization to board module.

* ChibiOS: Rename "application" board, add "baseband" board.

There are now two ChibiOS "boards", one which runs the application and does the hardware setup. The other board, "baseband", does very little setup.

* Clock Manager: Remove unused crystal enable/disable code.

* Clock Manager: Restore clock configuration to SPIFI bootloader state before app shutdown.

* Reset peripherals on app shutdown.

Be careful not to reset M0APP (the core we're running on) or GPIO (which is holding the hardware in a stable state).

* M4/baseband hal_lld_init: use IDIVA, which is configured earlier by M0.

This was causing problems during restart into HackRF mode. Baseband hal_lld_init changed M4 clock from IDIVA (set by M0) to PLL1, which was unceremoniously turned off during shutdown.

* Audio app: Stop audio PLL on shutdown.

* M4 HAL: Make LPC43XX_M4_CLK_SRC optional.

This was changing the BASE_M4_CLK when a baseband was run.

* LPC43xx C++ layer: Fix IDIVx constructor IDIV narrow field width.

* Application board: hide the peripherals_reset function, as it isn't useful except during hardware init.

* Consolidate hardware init code to some degree.

ClockManager is super-overloaded and murky in its purpose.
Migrate audio from IDIVC to IDIVD, to more closely resemble initial clock scheme, so it's simpler to get back to it during shutdown.

* Migrate some startup code to application board.

* Si5351: Use correct methods for reset().

update_output_enable_control() doesn't reset the enabled outputs to the reset state, unless the object is freshly initialized, which it isn't when performing firmware shutdown.
For similar reasons, use set_clock_control() instead of setting internal state and then using the update function.

* GPIO: Set SPIFI CS pin to match input buffer state coming out of bootloader.

* Change application board.c to .cpp, with required dependent changes

* Board: Clean up SCU configuration code/data.

* I2S: Add shutdown code and use it.

* LPC43xx: Consolidate a bunch of structures that had been scattered all over.

...because I'm an undisciplined coder.

* I2S: Fix ordering of branch and base clock disable.

Core was hanging, presumably because the register interface on the branch/peripheral was unresponsive after the base clock was disabled.

* Controls: Save and expose raw navigation wheel switch state

I need to do some work on debouncing and ignoring simultaneous key presses.

* Controls: Add debug view for switches state.

* Controls: Ignore all key presses until all keys are released.

This should address some mechanical quirks of the navigation wheel used on the PortaPack.

* Clock Manager: Wait for only the necessary PLL to lock.

Wasn't working on PortaPacks without a built-in clock reference, as that uses the other PLL.
TODO: Switching PLLs may be kind of pointless now...

* CMake: Pull HackRF project from GitHub and build.

* CMake: Remove commented code.

* CMake: Clone HackRF via HTTPS, not SSH.

* CMake: Extra pause for slow post-DFU firmware boot-up.

* CMake: TODO to fix SVF/XSVF file source.

* CMake: Ask HackRF hackrf_usb to make DFU binary.

* Travis-CI: Add dfu-util, now that HackRF firmware is being built for inclusion.

* Travis-CI: Update build environment to Ubuntu xenial

Previously Trusty.

* Travis-CI: Incorrectly structured my request for dfu-util package.

I'm soooo talented.

* ldscript: Mark flash, ram with correct R/W/X flags.

* ldscript: Enlarge M0 flash region to 1Mbyte, the size of the HackRF SPI flash.

* Receiver: Hide PPM adjustment if clock source is not HackRF crystal.

* Documentation: Update product photos and README.

* Documentation: Add TCXO feature to README description.

* Application: Rearrange files to match HAVOC directory structure.

* Map view in AIS (#213)

* Added GeoMapView to AISRecentEntryDetailView

* Added autoupdate in AIS map

* Revert "Map view in AIS (#213)"

This reverts commit 262c030224.

This commit will be cherry-picked onto a clean branch, then re-committed after a troublesome pull request is reverted.

* Revert "Upstream merge to make new revision of PortaPack work (#206)"

This reverts commit 920b98f7c9.

This pull request was missing some changes and was preventing firmware from functioning on older PortaPacks.

* CPLD: Pull bitstream from HackRF project.

* SGPIO: Identify pins on CPLD by their new functions. Pull down HOST_SYNC_EN.

* CPLD: Don't load HackRF CPLD bitstream into RAM.

Trying to converge CPLD implementations, so this shouldn't be necesssary. HOWEVER, it would be good to *check* the CPLD contents and provide a way to update, if necessary.

* CPLD: Tweak clock generator config to match CPLD timing changes in HackRF.

* PinConfig: Drive CPLD pins correctly.

* CMake: Use jboone/hackrf master branch, now that CPLD fixes are there.

* CMake: Fix HackRF CPLD SVF dependency.

Build would break on the first pass, but work if you restarted make.

* CMake: Fix my misuse of the HackRF CMake configuration -- was building from too deep in the directory tree

* CMake: Work-around for CMake 3.5 not supporting ExternalProject_Add SOURCE_SUBDIR.

* CMake: Choose a CMP0005 policy to quiet CMake warnings.

* Settings: Show active clock reference. Only show PPM adjustment for HackRF source.

* Radio Settings: Change reference clock text color.

Make consistent color with other un-editable text.
TODO: This is a bit of a hack to get ui::Text objects to support custom colors, like the Label structures used elsewhere.
2019-02-03 18:25:11 +00:00
Maescool
920b98f7c9 Upstream merge to make new revision of PortaPack work (#206)
* Power: Turn off additional peripheral clock branches.

* Update schematic with new symbol table and KiCad standard symbols.
Fix up wires.

* Schematic: Update power net labels.

* Schematic: Update footprint names to match library changes.

* Schematic: Update header vendor and part numbers.

* Schematic: Specify (arbitrary) value for PDN# net.

* Schematic: Remove fourth fiducial. Not standard practice, and was taking up valuable board space.

* Schematic: Add reference oscillator -- options for clipped sine or HCMOS output.

* Schematic: Update copyright year.

* Schematic: Remove CLKOUT to CPLD. It was a half-baked idea.

* Schematic: Add (experimental) GPS circuit.
Add note about charging circuit.
Update date and revision to match PCB.

* PCB: Update from schematic change: now revision 20180819.
Diff was extensive due to net renumbering...

* PCB: Fix GPS courtyard to accommodate crazy solder paste recommendation in integration manual.
PCB: Address DRC clearance violation between via and oscillator pad.

* PCB: Update copyright on drawing.

* Update schematic and PCB date and revision.

* gitignore: Sublime Text editor project/workspace files

* Power: Power up or power down peripheral clock at appropriate times, so firmware doesn't freeze...

* Clocking: Fix incorrect shift for CGU IDIVx_CTRL.PD field.

* LPC43xx: Add CGU IDIVx struct/union type.

* Power: Switch off unused IDIV dividers. Make note of active IDIVs and their use.

* HackRF Mode: Upgrade firmware to 2018.01.1 (API 1.02)

* MAX V CPLD: Refactor class to look more like Xilinx CoolRunner II CPLD class.

* MAX V CPLD: Add BYPASS, SAMPLE support.
Rename enter_isp -> enable, exit_isp -> disable.
Use SAMPLE at start of flash process, which somehow addresses the problem where CFM wouldn't load into SRAM (and become the active bitstream) after flashing.

* MAX V CPLD: Reverse verify data checking logic to make it a little faster.

* CPLD: After reprogramming flash, immediately clamp I/O signals, load to SRAM, and "execute" the new bitstream.

* Si5351: Refactor code, make one of the registers more type-safe.
Clock Manager: Track selected reference clock source for later use in user interface.

* Clock Manager: Add note about PPM only affecting Si5351C PLLA, which always runs from the HackRF 25MHz crystal.
It is assumed an external clock does not need adjustment, though I am open to being convinced otherwise...

* PPM UI: Show "EXT" when showing PPM adjustment and reference clock is external.

* CPLD: Add pins and logic for new PortaPack hardware feature(s).

* CPLD: Bitstream to support new hardware features.

* Clock Generator: Add a couple more setter methods for ClockControl registers.

* Clock Manager: Use shared MCU CLKIN clock control configuration constant.

* Clock Manager: Reduce MCU CLKIN driver current. 2mA should be plenty.

* Clock Manager: Remove redundant clock generator output enable.

* Bootstrap: Remove unnecessary ldscript hack to locate SPIFI mode change code in RAM.

* Bootstrap: Get CPU operating at max frequency as soon as possible.
Update SPIFI speed comment.
Make some more LPC43xx types into unions with uint32_t.

* Bootstrap: Explicitly configure IDIVB for SPIFI, despite LPC43xx bootloader setting it.

* Clock Manager: Init peripherals before CPLD reconfig. Do the clock generator setup after, so we can check presence of PortaPack reference clock with the help of the latest CPLD bitstream.

* Clock Manager: Reverse sense of conditional that determines crystal or non-crystal reference source. This is for an expected upcoming change where multiple external options can be differentiated.

* Bootstrap: Consolidate clock configuration, update SPIFI rate comment.

* Clock Manager: Use IDIVA for clock source for all peripherals, instead of PLL1. Should make switching easier going forward.
Don't use IRC as clock during initial clock manager configuration. Until we switch to GP_CLKIN, we should go flat out...

* ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution.

* PortaPack IO: Expose method to set reference oscillator enable pin.

* Pin configuration: Do SPIFI pin config with other pins, in preparation for eliminating separate bootloader.

* Pin configuration: Disable input buffers on pins that are never read.

* Revert "ChibiOS M0: Change default clock speed to 204MHz, since bootstrap now maxes out clock speed before starting M0 execution."

This reverts commit c0e2bb6cc4cc656769323bdbb8ee5a16d2d5bb03.

* Remove unused board files.

* Add LPC43xx functions.

* chibios: Replace code with per-peripheral structs defining clocks, interrupts, and reset bits.

* LPC43xx: Add MCPWM peripheral struct.

* clock generator: Use recommended PLL reset register value.

Datasheet recommends a value. AN619 is quiet on the topic, claims the low nibble is default 0b0000.

* GPIO: Tweak masking of SCU function.

I don't remember why I thought this was necessary...

* HAL: Explicitly turn on timer peripheral clocks used as systicks, during init.

* SCU: Add struct to hold pin configuration.

* PAL: Add functions to address The Glitch.

https://greatscottgadgets.com/2018/02-28-we-fixed-the-glitch/

* PAL/board: New IO initialization code

Declare initial state for SCU pin config, GPIOs. Apply initial state during PAL init. Perform VAA slow turn-on to address The Glitch.

* Merge M0 and M4 to eliminate need for bootstrap firmware

During _early_init, detect if we're running on the M4 or M0.
If M4: do M4-specific core initialization, reset peripherals, speed up SPIFI clock, start M0, go to sleep.
If M0: do all the other things.

* Pins: Miscellaneous SCU configuration tweaks.

* Little code clarity improvement.

* bootstrap: Remove, not necessary.

* Clock Manager: Large re-working to support external references.

* Fix merge conflicts
2019-01-11 06:56:21 +00:00
furrtek
1d13389b5a Bias-T now works in capture mode
Simplified soundboard app, still some work to do
Merge remote-tracking branch 'upstream/master'
2018-12-18 16:25:21 +00:00
Jared Boone
8feb79c710 Constrain enum type to address warning about underlying type conversion. 2018-08-05 15:17:48 -07:00
furrtek
609235b19f Testing external clock detection and auto-switch
Simplified audio spectrum computation and transfer
ACARS RX in debug mode
Disabled ABI warnings
Updated binary
2018-06-12 07:55:12 +01:00
furrtek
dc5d6fef70 Started work on ACARS RX
Added ACARS frequencies file
Moved non-implemented apps menu items down
2018-06-10 10:15:43 +01:00
furrtek
5c1ba9b90d Added cursor to audio spectrum view 2018-05-22 04:43:04 +01:00
furrtek
b813b32593 Added an audio FFT view in Wideband FM receive
Tried speeding up fill_rectangle for clearing the waveform widget
2018-05-21 18:46:48 +01:00
furrtek
b11c3c94b6 Added tone key mix ratio in Settings -> Audio
Renamed Setup to Settings
Updated binary
2018-05-16 09:45:13 +01:00
furrtek
b29c1d9749 Finally found what was eating all the RAM :D
Re-enabled the tone key selector in Soundboard
Soundboard now uses OutputStream, like Replay
Constexpr'd a bunch of consts which were going to BSS section
Exiting an app now goes back to main menu
Cleaned up Message array
2018-05-15 23:35:30 +01:00
furrtek
8573f760be Added basic APRS transmit
Added goertzel algo
Updated binary
2018-02-23 20:21:24 +00:00
furrtek
7fd987a2b4 Added support for multiple sample rates in IQ record
Support for any sample rate <= 500k in IQ replay
Fixed bias-t power not activating in TX
Removed RSSI pitch output option (awful code)
Udated binary
2018-02-22 07:04:19 +00:00
RndmNmbr
36e5682406
Update ui_widget.hpp
Added include of <functional> to allow for a clean build with g++ 7.2.1 20170904
2018-02-03 13:41:40 -05:00
furrtek
57c759627d Fixed mic tx not working the first time it was entered
Fixed SD card FAT wipe (buffer size too big)
Cleared some warnings from ADSB rx
Updated binary
2018-02-01 11:17:51 +00:00
furrtek
441a266dc4 Added back scanning in BHT TX
Added file creation date display in File Manager
2018-01-09 21:12:19 +00:00
furrtek
f0c912be2e Added Bias-T toggle confirmation
Backlight setting save bugfix
Updated binary
2018-01-08 03:47:37 +00:00
furrtek
3193c6ee99 Added bias-T status icon
Merged radio settings in one screen
2018-01-07 23:13:08 +00:00
furrtek
c9381f1418 Added loop option in Replay app
Updated binary
2017-12-11 04:14:54 +00:00
furrtek
3d2dacaf29 Added range file and range type to frequency manager (mainly for jammer)
Made MenuView use less widgets, hopefully preventing crashes with large
lists
Fixed M10 sonde crash on packet receive
Updated about screen
Updated binary
2017-12-08 18:58:46 +00:00
furrtek
b38adf3769 Replay of IQ files ! :D
Added icons and colors for commonly used files in Fileman
Fileman can filter by file extension
Bugfix: Fileman doesn't crash anymore on renaming long file names
Updated binary
2017-12-07 00:58:25 +00:00
furrtek
3221992ad1 Added back frequency display for CTCSS
Attempted to fix replay, just fixed StreamBuffer read() and added
waterfall display...
Updated binary
2017-12-06 13:20:51 +00:00
furrtek
d77337dd77 Added CTCSS decoder in NFM RX
RSSI output is now pitch instead of PWM
Disabled RSSI output in WBFM mode
2017-11-28 08:52:04 +01:00
furrtek
dc82f15ece Started adding decoders for RS41 radiosondes
Hopefully fixed M2K2 radiosonde battery voltage decoding
Updated binary
2017-11-10 02:20:44 +00:00
furrtek
1b93dd53e8 Tone generator class 2017-11-10 00:25:04 +00:00
furrtek
4465cfb905 Added tone keys for some wireless mic brands
Renamed CTCSS stuff to Tone key
Changed PTT key in mic TX (was left, now right) to allow easier exit
Mic samplerate bumped to 48kHz
Updated binary
2017-11-09 20:02:34 +00:00
furrtek
196518457f Fixed freeze in TouchTunes scan
Made adsb_map.py compatible with Python 3
2017-11-08 21:08:46 +01:00
furrtek
17b238f3a8 Added "test app" as a draft zone for... stuff
Added second signature for M2K2 radiosonde
2017-10-30 02:00:39 +01:00
furrtek
d4207cde7b Merge branch 'master' of https://github.com/furrtek/portapack-havoc 2017-10-28 19:29:09 +02:00
Furrtek
046d1c7c15 Updated ui_widget.cpp 2017-10-28 19:27:18 +02:00
furrtek
6ff8249a4f Added logging, serial number and battery voltage display to radiosonde RX
Added decimal degrees display to geopos widget
2017-10-28 19:16:06 +02:00
furrtek
d47f292d3a Radiosonde RX now understands Meteomodem's M10 correctly
Updated binary
2017-10-27 18:54:50 +02:00
furrtek
6e7b2c751f Added wav file viewer
Fileman open now allows going into subdirectories
Updated binary
2017-10-15 15:53:40 +01:00
furrtek
40a71d32a2 Added keyfob UI and debug functions
Fixed hex display truncated to 32 bits instead of 64
Updated binary
2017-10-14 16:30:49 +01:00
furrtek
d3222c27ca Started working on radiosonde RX
Removed some warnings
Better handling of absent map file in GeoMap ?
2017-10-05 05:38:45 +01:00
furrtek
73d47cd77d Added remaining buttons for TouchTunes remote
LCR transmit UI cleanup
CC1101 data whitening function
Uniformized tx progress message handling
2017-09-24 20:05:42 +01:00
furrtek
26949773bb Added TouchTunes remote 2017-09-23 12:02:32 +01:00
furrtek
9acfdcbd41 Added function setting in POCSAG TX
POCSAG TX: Max message length is now 30 (was 16 for no reason)
2017-09-23 04:53:42 +01:00
furrtek
a6d2b766f4 Fixed EPAR transmit 2017-09-21 09:18:17 +01:00
furrtek
c0f51c2690 Date and time display widget
Disabled handwriting text input (not that useful for now)
Bugfix: Trim long filenames in fileman
Slight cleanup of 7-seg display widget
2017-09-20 07:50:59 +01:00
furrtek
950bc2b1d2 AFSK RX works (only Bell202 for now)
AFSK RX always logs to file
Removed frequency and bw settings from modem setup view
Updated binary
Bugfix: Binary display shifted one bit
Bugfix: Frequency manager views freezing if SD card not present
Bugfix: Menuview blinking arrow not showing up at the right position
Bugfix: Freeze if console written to while it's hidden
Broken: LCR TX, needs UI update
2017-09-02 08:28:29 +01:00
furrtek
42439d1885 Started writing (copying...) AFSK RX
Encoders: removed bit duration setting (frame duration is more useful)
2017-08-29 09:42:04 +01:00
furrtek
3aae333974 ADSB RX text color bugfix
ADSB RX entries now "age" after 10 and 20 seconds
2017-08-27 21:03:17 +01:00
furrtek
2628f9c03d ADSB position decoding
Date and time string format function
Binary update
2017-08-17 12:56:47 +01:00
furrtek
9d902bc224 ADSB RX now works \o/
Added tabs in RDS TX, multiple groups can be sent at once
Bugfix: text not updating on UI after text prompt
2017-08-16 10:02:57 +01:00
furrtek
7f97a090e4 Fixed ADSB TX frame rotation 2017-08-12 09:54:58 +01:00
furrtek
e5fef6bb89 Added tabs to BHT TX and Jammer
Updated firmware binary
2017-08-12 00:27:05 +01:00
Jared Boone
f726a54f25 Fix whitespace to match furrtek/portapack-havoc. 2017-08-09 17:08:30 -07:00
Jared Boone
39617f38bf TPMS: Remove unused variable.
May use again, so commented out.
2017-08-08 10:36:17 -07:00
Jared Boone
58e0432b56 I2S: Enable input buffer on SCK for LPC43xx slave mode. 2017-08-06 12:44:27 -07:00
Jared Boone
ac423ee769 Audio: Add codec config methods for external I2S master. 2017-08-06 12:43:39 -07:00
Jared Boone
6c3a1384fb WM8731: Extract interface configuration method. 2017-08-06 12:08:12 -07:00
Jared Boone
f0947a4917 AK4951: Separate/rename codec interface mode config methods. 2017-08-06 12:02:38 -07:00
Jared Boone
49252dc1bc LPC43xx: Add CREG6 struct definition. Add I2S CREG6 configuration. 2017-08-06 11:16:57 -07:00
furrtek
fba5b507ad Made a GeoPos widget for lon/lat/alt entry and display (APRS...)
Cleaned up the GeoMap view, can be used as input
2017-08-03 19:06:59 +01:00
furrtek
a5f0f72ea1 Split ADSB TX into tabs
Simplified TabView a lot
2017-07-30 14:46:42 +01:00
furrtek
89a3afcd74 Started writing TabView
Loopable NumberField
2017-07-30 09:39:01 +01:00
furrtek
0cbf9cd386 Added velocity/bearing ADS-B frame for tx
Added compass widget
Manchester encoder
2017-07-25 08:30:12 +01:00
furrtek
c2a9ed7d9b Merge remote-tracking branch 'upstream/master' 2017-07-25 00:20:57 +01:00
furrtek
5a67a7080a ADS-B TX works well enough for dump1090 and gr-air-modes
Hooked ADS-B RX to baseband instead of debug IQ file, not tested
2017-07-23 12:20:32 +01:00
Jared Boone
e9895c1b11 IO: Enable input buffer on LCD_WRX.
Just for consistency. Other LCD interface pin states are read during interrupt.
2017-07-20 16:37:48 -07:00
Jared Boone
751ae92509 CPLD: Switch sense of LCD_RD/WR pins.
Should keep CPLD settled when in HackRF mode.
2017-07-20 16:33:55 -07:00
Jared Boone
aa189a3462 Backlight: Add abstraction for support of different hardware. 2017-07-18 21:29:32 -07:00
Jared Boone
1eb561ab45 LCD: Rename lcd_write_data_fast to lcd_write_data.
It's the only LCD write function!
2017-07-18 13:27:15 -07:00
Jared Boone
aa66c0b7f7 LCD: Consolidate read functions.
Faster function consumed by slower function, because faster function was failing during testing.
2017-07-18 13:23:16 -07:00
Jared Boone
2064689d46 IO: Remove out-of-date comment. 2017-07-18 13:17:10 -07:00
Jared Boone
030a0bcb0c IO: Add LCD write function for C arrays. 2017-07-18 13:16:41 -07:00
Jared Boone
bb194825ae ILI9341: Refactor sleep on/off, display on/off functions. 2017-07-18 13:13:13 -07:00
furrtek
58f113d153 "CW generator" and "Whistle" merged in "Signal generator"
Added wave shape selection and tone frequency auto-update
Converted color icons to B&W
2017-07-18 19:31:05 +01:00
Jared Boone
23c340abb2 MAX V: Add shift_dr() for testing. 2017-07-18 10:53:43 -07:00
Jared Boone
963579d82a AK4951: Adjust initial microphone gain. 2017-07-18 10:53:08 -07:00
Jared Boone
62b1a82b6b Doc: Fix incorrect comment about MCU->CPLD pin functions. 2017-07-17 16:41:02 -07:00
Jared Boone
1b9a569022 SDC: Adjust clock/data timing and output drive to match SD specs, measurements. 2017-07-17 16:38:31 -07:00
furrtek
33a2df9d2a OutputStream (file M0 -> M4 radio) now works
Disabled numbers station for now (too buggy, low priority)
2017-06-23 08:40:22 +01:00
furrtek
abd154b3c7 Merge remote-tracking branch 'upstream/master'
Base class for text entry
2017-06-21 03:25:27 +01:00
Jared Boone
47cc88d1e1 ILI9341: Tidy scroll types, use height(). 2017-06-19 16:31:54 -07:00
furrtek
e2f0a03460 Using new CPLD data (fixes spectrum mirroring)
Scanner bugfix for wide ranges
Added squelch parameter for NFM receiver
Adjustment to Vumeter widget rendering
2017-06-11 09:50:29 +01:00
Jared Boone
dec4e41189 CPLD: Organize CPLD code into namespaces.
Use type aliases to hide actual CPLD type (somewhat).
2017-06-02 21:57:13 -07:00
Jared Boone
dd0c009e6f CPLD: Stop generating HackRF CPLD .hpp file. 2017-06-02 21:55:35 -07:00
Jared Boone
3d06941129 Move CPLD filres to common/
...for imminent refactoring.
2017-06-02 17:13:41 -07:00
Jared Boone
a3483a8394 CPLD: Introduce Config type to clean up programming interface.
Hide the details of how the CPLD data is stored.
2017-06-02 16:54:24 -07:00
Jared Boone
797e63a590 CPLD: Use correct bitstream for updating hardware.
Determine hardware version and use one of two CPLD bitstream files.
2017-05-31 22:28:07 -07:00
Jared Boone
600dcb734e AK4951: Initial commit. 2017-05-31 11:45:54 -07:00
Jared Boone
bec626e29f WM8731: Add Codec abstraction. 2017-05-31 11:42:12 -07:00
Jared Boone
37c058354e WM8731: Add method to detect codec is present.
Used to determine PortaPack hardware version.
2017-05-31 11:34:16 -07:00
Jared Boone
8f5555b052 WM8731: Store headphone volume for mute() function.
So when unmuted, previous volume can be restored.
2017-05-31 11:32:32 -07:00
Jared Boone
f6e1e78e8a WM8731: Return bool from reset() and low-level write()s. 2017-05-31 11:28:00 -07:00
Jared Boone
b3ee884f16 I2S RX: Set RX SDA pin to correct SCUMUX mode.
It's left in GPIO mode ordinarily, because of CPLD programming earlier in boot-up.
2017-05-26 16:50:34 -07:00
Jared Boone
556085b3e3 I2S: Enable TX_WS output pin's input buffer.
This permits receipt of TX_WS as RX_WS for the receive side of the I2S peripheral, and was why I got no RX samples when testing microphone input.
2017-05-22 14:20:49 -07:00
furrtek
a35d9ee8a9 Missing image files 2017-05-18 21:56:55 +01:00
furrtek
38e14b1e30 Scanner: Added last locked frequencies list
Added back squelch to NFM receiver
Scanner: cleanup
Widgets: VU-meter cleanup
2017-05-18 11:06:11 +01:00
Jared Boone
dd0048db8d Remove broken simd32_t type. 2017-05-03 09:58:07 +01:00
Jared Boone
19e42196db Fn for control of audio codec reset signal. 2017-05-01 10:37:49 +01:00
Jared Boone
b12f90ef08 Adjust initial CPLD io_reg value for new CPLD code. 2017-05-01 10:34:33 +01:00
furrtek
8c680ff893 Simplified LCR code a bit
Split modem into modem and serializer
Frequency string formatter
2017-04-24 18:15:57 +01:00
furrtek
90feadd9f5 POCSAG RX saves ignored address
Made AFSK code more generic (not tied to LCR)
Added modem presets and more options in AFSK setup
String-ized and simplified LCR UI code
Simplified AFSK baseband code, made to always work on 16bit words
2017-04-21 06:22:31 +01:00
furrtek
eff96276c3 Made back button always focusable with left key 2017-04-21 00:31:21 +01:00
furrtek
40b49e2072 POCSAG address filter now ignores alpha messages
Experimenting with FIFOs for replay...
2017-04-19 22:05:16 +01:00
furrtek
3a1e5b8772 Added address filter in POCSAG RX
Changed POCSAG log format
Console widget knows red, green and blue now
2017-04-18 21:29:55 +01:00
furrtek
fbc054ca75 Coaster pager address scan
Merged tone setups
2017-04-11 08:42:31 +01:00
furrtek
685e4c6e4b Added more SSTV modes
A bit more work done on Replay (still not enabled)
2017-03-23 21:28:21 +00:00
furrtek
6a0bcb9cca SSTV transmit beta (320x256 24bpp Scottie 2 only) 2017-03-23 04:29:58 +00:00
furrtek
5b74b83458 Bitmap preview in SSTV TX 2017-03-22 18:21:31 +00:00
furrtek
089eeeafe4 Tones bugfix, numbers station voice files search 2017-03-22 03:21:06 +00:00
furrtek
16acb9db28 Added roger beep option in mic TX 2017-03-14 08:20:13 +00:00
furrtek
37cfcd392d Added DCS parity table and generator tool 2017-03-14 07:24:04 +00:00
furrtek
69b0ef9a40 Microphone tx is mostly working, Voice activation, PTT, CTCSS...
Transmit bandwidth bugfix
TX LED is now only lit when using rf amp
VU-meter widget
Added gain parameter for baseband audio TX
2017-03-13 04:09:21 +00:00
furrtek
2d75722b74 Added microphone TX (very basic for now) 2017-03-12 07:10:09 +00:00
furrtek
446efa8fc0 Reduced audio tx FIFO refill size
Last received POCSAG address is auto loaded in POCSAG tx
2017-03-05 15:37:56 +00:00
furrtek
2022fe137c Morse TX bugfix: bad CW symbols, FM not stopping
Corrected fox hunt transmitter #s
Moved widgets a bit
Setting up proc_tones with 0 message length stops it
2017-03-03 08:06:11 +00:00
furrtek
0ba05fea5e Morse special chars and tx duration indication 2017-02-15 04:27:51 +00:00
furrtek
0642c57041 Utility: CW generator 2017-02-15 03:05:38 +00:00
furrtek
6c86ad1b72 Morse TX foxhunt codes are working 2017-02-13 23:24:42 +00:00
furrtek
4e8980e5d8 Finished jammer modes
Shaved off a few kBs by using the Labels widget
2017-02-13 05:35:13 +00:00
furrtek
d12cd0d8af "Labels" widget 2017-02-12 07:23:31 +00:00
furrtek
0102a34286 Reverted WFM mode to working state
TXView in ADSB TX
Lockable TXView
POCSAG TX bugfix with Alphanum and Numeric only
Testing Labels widget
2017-02-12 04:05:21 +00:00
furrtek
21de81bb85 POCSAG TX: Support for numeric only and address only messages 2017-02-08 01:19:29 +00:00
furrtek
fc8279aa30 POCSAG TX text and bitrate can be changed
Modal view message can be multiline now
2017-02-07 19:54:18 +00:00
furrtek
dc7fcbc6c3 POCSAG TX (with fixed message for testing) 2017-02-07 17:48:17 +00:00
furrtek
24abe4b427 Yet another POCSAG bugfix (multi-batch messages are not cut anymore)
Added BCH ECC functions for checking, error correction and encoding
2017-02-06 20:32:33 +00:00
furrtek
98f89a84bb Improved POCSAG receiver reliability 2017-02-05 20:57:20 +00:00
furrtek
607e6c5bd4 CTCSS in soundboard. 24 jammer chs instead of 9.
Soundboard random mode now cares about loop option.
Started documenting UI.
2017-02-02 09:29:14 +00:00
furrtek
8662ed4024 Close Call should be more accurate
Merged close call and wideband spectrum baseband processors
2017-02-01 08:53:26 +00:00
furrtek
064e097bc3 Symfield widget auto-inits
ADS-B emergency frame
2017-02-01 00:21:13 +00:00
furrtek
0642d633c3 Frequency manager empty file bugfix 2017-01-30 01:09:00 +00:00
furrtek
f0fbc356ad Jammer bugfix: now produces all the right channels 2017-01-17 14:27:37 +00:00
furrtek
7cb38f858e Udpdated jammer baseband code, should work again 2017-01-17 08:42:35 +00:00
furrtek
368f0f7fb0 Digital mode for waveform widget, 2.4GHZ WLAN channels in jammer 2017-01-17 07:00:42 +00:00
furrtek
b10c88e271 POCSAG bitrate selection and logging toggle
Small checkboxes
2017-01-16 13:36:28 +00:00
furrtek
e4abcea9a3 Added bitrate option for POCSAG baseband, PWMRSSI frequency option
Split SD card wiper app
Cleanup for -Weffc++
2017-01-16 08:40:17 +00:00
furrtek
5e40669cbc Merge 'upstream/master' - At least it builds... 2017-01-16 03:45:44 +00:00
furrtek
12aeae3a82 Commit replay stuff before sync 2017-01-10 19:45:40 +00:00
furrtek
3ec725c172 Added SD card wiper tool
Frequency manager now creates FREQMAN.TXT if not found
Moved graphics files
2017-01-10 18:40:33 +00:00
furrtek
a0c248d567 Added waveform widget and a frequency field in encoders tx 2017-01-09 02:45:29 +00:00
Jared Boone
05eb694c0a Introduce simd32_t type.
Discontinue use of disagreeable __SIMD #define.
2017-01-06 16:57:36 -08:00
Jared Boone
177d49b769 GPIO: Fix for incorrect pin-funciton bit mask.
Caused device to not boot. Oops.
2017-01-06 14:22:27 -08:00
Jared Boone
87383d735c C++14: Decommission my own make_unique. 2017-01-05 17:14:07 -08:00
Jared Boone
0d1e48ae9c C++14: Add two-argument delete() implementations.
Just passing to one-argument versions.
2017-01-05 17:13:03 -08:00
Jared Boone
a22dc150bc C++14: make some wrapper classes static.
Also address GCC 6.2 not allowing constexpr from reinterpret_cast<> values.
2017-01-05 17:10:00 -08:00
Jared Boone
0ea2f9650e C++14: const all the methods! 2017-01-05 17:06:44 -08:00
furrtek
f033782d4b Playdead default sequence and validity check 2016-12-26 13:49:23 +01:00
furrtek
7df5987b3b Added utilities > Frequency manager + load/save 2016-12-26 01:31:38 +01:00
furrtek
6bcb7dc1b1 # This is a combination of 2 commits.
# The first commit's message is:

Updated RDS transmitter: flags, PI and date/time

Merging baseband audio tone generators

Merging DTMF baseband with "tones" baseband

Added stealth transmit mode

App flash section bumped to 512k
RX and TX LEDs are now used
Play dead should work again, added login option
Morse frame gen. for letters and fox hunt codes
Merged EPAR with Xylos
Made EPAR use encoders for frame gen.
Moved OOK encoders data in encoders.hpp
Simplified about screen, ui_about_demo.* files are still there

BHT city DB, keywords removed

BHT cities DB, keywords removed

Update README.md

RDS radiotext and time group generators

# This is the 2nd commit message:

Update README.md
2016-12-24 11:52:11 +01:00
furrtek
75e8a664b0 3D buttons, to make UI clearer 2016-12-23 18:31:03 +01:00
furrtek
28ea2179f4 Re-enabled closecall even if it's still not working well
RDS PSN works again but update issue (UI ?)
Moved CTCSS stuff to dedicated file
2016-12-23 18:31:02 +01:00
furrtek
1db138c27a Wavfile class 2016-12-23 18:31:02 +01:00
furrtek
e56fa0f479 Numbers station works, very basic
Added utilities, whip antenna length calculator
Modal errors/abort
2016-12-23 18:31:02 +01:00
furrtek
d18b6d135d Restoring jammer and RDS functionalities, please wait...
Started work on frequency manager and numbers station simulator
2016-12-23 18:31:01 +01:00
furrtek
ef0feae62b Started work on ADS-B TX baseband processor 2016-12-23 18:31:01 +01:00
Jared Boone
01cd8c7776 GPIO: Fix PinConfig -> uint16_t type conversion signature. 2016-12-21 22:24:07 -08:00
Jared Boone
ad9a63a666 GPIO: Fix apparent dumb bit-logic bug.
Not due to any observable incorrect behavior, but just noticing that the code, as previously written, should not work...
2016-12-21 22:20:28 -08:00
Jared Boone
f2dd6827ea Add Widget::parent_rect() accessor, rename member variable.
Some day I will settle on a convention for naming members... I think that day is near.
2016-12-06 09:28:48 -08:00
furrtek
bb6eefe2be Started ADS-B TX UI and frame encoding 2016-11-30 07:41:55 +01:00
Jared Boone
3f94591083 Remove a lot of static_cast<>s involving UI structs.
Also starting to get religion on using unsigned integers only when I want their wrapping/modulus behavior.
2016-11-29 10:13:56 -08:00
Jared Boone
227719ff1d Fix static_cast warning. 2016-11-28 12:05:24 -08:00
Jared Boone
e820bed097 Hide ui::Rect implementation. 2016-11-28 11:25:27 -08:00
Jared Boone
d15ace4676 Hide ui::Size implementation. 2016-11-28 10:55:45 -08:00
Jared Boone
aac2d31548 Hide ui::Point implementation. 2016-11-28 10:39:10 -08:00
Jared Boone
46b3d9d087 Disallow copy constructors/assignments.
For classes containing pointers/state that should not be copied.
2016-11-26 16:52:57 -08:00
Jared Boone
4eb0facacb Add lots of value constructors. 2016-11-26 16:50:44 -08:00
Jared Boone
cd31ae86d7 Add single-arg constructor for vec2_s16. 2016-11-26 16:42:03 -08:00
Jared Boone
a33476259e Create buffer.cpp, reduce #include dependencies and impl leakage. 2016-10-24 11:16:48 -07:00
Jared Boone
5dfb53263a Extract BufferExchange, simplify threading. 2016-10-06 13:38:56 -07:00
Jared Boone
414dd41577 Allow modification of StreamBuffer (data values, size). 2016-10-04 09:15:19 -07:00
furrtek
8c70ef08f8 Fixed xx2262 remote encoder def
SymField now shows symbol chars
2016-09-27 03:06:14 +02:00
furrtek
8276e5e311 Added CTCSS in Soundboard 2016-09-23 23:08:54 +02:00
furrtek
bb29efeda6 Added Nuoptix DTMF sync transmit (Disney parades, light shows...)
Soundboard ignores stereo files
2016-09-23 17:34:50 +02:00
Jared Boone
df0fc30fda Rect: Comment about a bad API method.
In retrospect, I don't like Rect + Rect = union -- it doesn't make as much sense and isn't as readable as Rect.union(Rect).
2016-09-07 22:19:30 -07:00
Jared Boone
f722497b01 Rect: operator method to offset by a Point. 2016-09-07 22:18:11 -07:00
Jared Boone
09222f0044 Widget/View: Consolidate dirty code inside Widget. 2016-09-05 15:04:28 -07:00
Jared Boone
8a69b0523e View::add_children: Use std::list_initializer as argument.
Improvement in code size -- 944 bytes.

Some day I will understand C++11 well enough to do the right thing the first time.
2016-09-05 14:53:04 -07:00
Jared Boone
5d2ad9c1aa SGPIO: Use pin constants when changing output enables. 2016-08-30 21:33:44 -07:00
Jared Boone
00c7cdf027 CPLD: Always clock SGPIO data on external clock rising edge. 2016-08-30 21:30:03 -07:00
Jared Boone
f0c4b0fc98 AIS: Doesn't use RRC filter -- use rect instead. 2016-08-29 20:47:37 -07:00
furrtek
808f99647e Soundboard: Arbitrary samplerate support for wave files
Screenshots
2016-08-26 09:54:17 +02:00
furrtek
f7e0f36bd9 Added Soundboard
file.cpp: scan_root_files
proc_audiotx.cpp: bandwidth setting
ui_widget.cpp: button on_focus
2016-08-26 08:11:24 +02:00
furrtek
5de6349199 Bitrate and flags for POCSAG packets, trim bugfix 2016-08-25 16:20:19 +02:00
furrtek
04cdafe387 Bugfix: POCSAG alphanum messages not showing
Bugfix: Range limit for afsk config
2016-08-24 14:44:57 +02:00
Jared Boone
e2fe4b65d9 CPLD: Set DECIM1 as input to CPLD.
How did DECIM work before?! Now, decimate is no longer a feature, so this doesn't really matter. But tidying it up anyway.
2016-08-23 10:30:05 -07:00
furrtek
02f0271553 Added basic POCSAG receiver
Added Yes/no modal screen (for future tx warnings)
2016-08-23 08:45:33 +02:00
Jared Boone
f7bfde73b6 FatFs: Enable long file name support.
Lots of re-plumbing to make this work, including a bunch of Unicode stuff now in the binary. Bloat City, I'm sure.

TODO: FatFs using unsigned (uint16_t) for UTF16 representation is kinda inconvenient. Lots of reinterpret_cast<>().
2016-08-21 18:06:39 -07:00
Jared Boone
77016b9a40 Rename CPLD "Q_INVERT" to signal to "INVERT".
Don't expose detail in name about how the task is accomplished.
2016-08-21 11:35:40 -07:00
Jared Boone
b0a3f680e5 CPLD: Remove decimation feature. 2016-08-21 11:31:37 -07:00
furrtek
c2fbc0c8d5 AudioTX, fixed about screen and an LCR address list bug 2016-08-17 04:17:24 +02:00
furrtek
45a754645e Merge remote-tracking branch 'upstream/master'
# Conflicts:
#	firmware/application/bitmap.hpp
#	firmware/application/receiver_model.cpp
#	firmware/application/receiver_model.hpp
#	firmware/application/touch.hpp
#	firmware/application/ui_setup.cpp
#	firmware/baseband/proc_ais.hpp
#	firmware/baseband/proc_ert.hpp
#	firmware/bootstrap/CMakeLists.txt
#	firmware/common/portapack_persistent_memory.cpp
#	firmware/common/portapack_persistent_memory.hpp
2016-08-17 02:55:34 +02:00
Jared Boone
52c089c4df SGPIO: Hi-Z data bus before setting direction pin.
Another tactic to avoid bus contention, however brief.
2016-08-13 16:46:02 -07:00
Jared Boone
62d2ae2336 SGPIO: Change bus direction more deliberately.
There may have been an instant where the CPLD and SGPIO were driving the bus simultaneously, when switching from TX to RX.
2016-08-13 16:42:39 -07:00
furrtek
38e506a108 OOK transmit is mostly working, bit durations are wrong
Simplified messages carrying data (uses shared_memory instead)
Added SymField widget (bitfield, symbol field...)
Added some space for baseband code
BMP palette loading bugfix
2016-08-06 08:49:45 +02:00
furrtek
787f656500 Testing OOK TX baseband module 2016-08-03 08:53:50 +02:00
furrtek
1b44b22419 Wrote most of the Encoders TX app (lacks baseband module)
Fixed menu scroll glitch
Added set_range to NumberField widget
2016-08-03 04:53:51 +02:00
furrtek
e2218a0f32 More AFSK options, scan lists, 2016-08-02 12:44:31 +02:00
furrtek
72f3c08e9b Added raw ASCII char field in keyboard view 2016-08-01 20:06:17 +02:00
furrtek
c58039e557 Fixed LCR scan and alt format, console widget, text input autotrim 2016-07-29 04:52:51 +02:00
furrtek
1d697d2201 Added PWM RSSI output for NBFM and WFM 2016-07-28 05:25:33 +02:00
Jared Boone
c424bf08f3 Touch: Migrate touch calibration to persistent memory. 2016-07-27 15:30:43 -07:00
furrtek
1beac3bdbd Added repeat setting for AFSK TX, fixed LCR scan, cleaned up LCR
Added max setting for progressbars, default = 100
2016-07-28 00:08:05 +02:00
Jared Boone
82f6e7c306 Change default frequency when NVRAM is initialized. 2016-07-27 14:17:57 -07:00
furrtek
e958b4bd7d Fixed LCR transmit and AFSK baseband module 2016-07-27 21:26:03 +02:00
furrtek
79f2134d91 Cleaned up Xylos TX, J/N works again 2016-07-27 05:54:55 +02:00
furrtek
739956b42b Sync with Sharebrained's fw, only Xylos TX works for now 2016-07-27 03:03:40 +02:00
Jared Boone
20bcbf511e Move thread_base.hpp from baseband/ to common/.
I want to use it with M0 code as well.
2016-07-26 10:22:10 -07:00
furrtek
fdfa7c9776 Merge remote-tracking branch 'upstream/master'
Conflicts:
	firmware/Makefile
	firmware/application/Makefile
	firmware/application/event_m0.cpp
	firmware/application/ui_setup.cpp
	firmware/application/ui_setup.hpp
	firmware/baseband/baseband_thread.cpp
	firmware/baseband/baseband_thread.hpp
	firmware/bootstrap/CMakeLists.txt
	firmware/common/message.hpp
	firmware/common/portapack_shared_memory.hpp
	hardware/.gitignore
2016-07-25 16:35:42 +02:00
furrtek
966a758a0b Added frequency manager skeleton, LCR alt encoding, GPS jammer 2016-07-25 16:21:27 +02:00
Jared Boone
8b02e40602 Move touch ADC data collection to M0.
...so it continues when M4 is shut down.

It's not as pretty as using DMA, but it's far simpler, even if it involves letting the ADC run continuously and taking the last samples even if not synchronizing to the phase of the sampling of the channels.
2016-07-24 15:31:53 -07:00
Jared Boone
b3f4ea8978 Clean up SharedMemory placement new. 2016-07-24 15:27:05 -07:00
Jared Boone
49d6cda731 Move BasebandConfiguration to receiver_model.hpp.
That's the only place it's being used now -- it's no longer moving between cores.
2016-07-19 17:11:32 -07:00
Jared Boone
74b5571e8b Remove baseband::start()/stop() and related message. 2016-07-19 17:06:22 -07:00
Jared Boone
4b7fa9f411 CPLD: Add XC2C64A method to init from EEPROM contents. 2016-07-18 11:31:21 -07:00
Jared Boone
4cc356f325 JTAG: Code to manage HackRF CPLD interactions. 2016-07-17 15:45:00 -07:00
Jared Boone
71c7f543c5 JTAG: Add TAP state management.
Not all that happy with the implementation, but it's doing the job for now.
2016-07-17 15:44:30 -07:00
Jared Boone
c0f4fbe32d JTAG: Add GPIO definitions for HackRF CPLD. 2016-07-16 14:06:58 -07:00
Jared Boone
22143c9543 JTAG: Remove unused methods. 2016-07-13 11:02:13 -07:00
Jared Boone
18fe30136e JTAG: Move Target interface to separate header. 2016-07-11 09:39:02 -07:00
Jared Boone
6917ffe1e3 JTAG: Clean up definition of Target interface. 2016-07-11 09:16:47 -07:00
Jared Boone
ad4a68f90a CMake: Generate portapack_cpld_data.cpp from SVF via tool. 2016-07-05 12:45:31 -07:00
Jared Boone
3ed1d9e24a CPLD: Method to calculate bitstream CRC32. 2016-07-05 12:06:51 -07:00
Jared Boone
df825807d6 CRC: Rearrange public methods to reduce user error.
If you can access process_bits() without considering RevIn value, you will likely not get the CRC value you're expecting! Put RevIn check where it belongs, in process_bits().
2016-07-05 11:57:57 -07:00
Jared Boone
57293bc5eb Clear application message queue after baseband is shut down. 2016-07-02 16:19:41 -07:00
Jared Boone
eac4cf678a Capture M4 chDbgPanic msg, show in application. 2016-07-02 15:33:03 -07:00
Jared Boone
97ba19af24 Change M4 loader to use image tags.
Also finish moving HackRF binary to tagged image region.
2016-07-01 10:37:22 -07:00
Jared Boone
0e62876578 Add types for tagged data chunks in SPI flash. 2016-07-01 10:32:52 -07:00
Jared Boone
d41c6ee36a Simplify app->baseband message handling.
No need for a FIFO when all messages are intended to be synchronous.
2016-06-24 14:16:45 -07:00
Jared Boone
264c19b312 Rename CaptureThread message, callback method, handle success. 2016-06-21 12:05:55 -07:00
Jared Boone
81d4e59aeb Add CaptureThread success_callback. 2016-06-21 11:53:07 -07:00
Jared Boone
cfaa44b02a Send CaptureThread error into app-local message queue. 2016-06-21 11:04:10 -07:00
Jared Boone
dbe735233a Add app-local MessageQueue. 2016-06-21 10:57:44 -07:00
Jared Boone
7023616808 Move MessageQueue locations in SharedMemory structure. 2016-06-21 10:56:00 -07:00
Jared Boone
9f95eb90a3 Shrink baseband queue size, 2^12 -> 2^11. 2016-06-21 10:55:24 -07:00
Jared Boone
6bd191349a Hide MessageHandlerMap.
Definitely didn't belong in message.hpp, saw no reason to expose it outside translation unit (.cpp file).
2016-06-19 22:56:06 -07:00
Jared Boone
a475daeeea TPMS: Validate checksum for OOK 8k192 Schrader. 2016-06-02 23:09:55 -07:00
Jared Boone
9628815da7 TPMS: Validate checksum for the OOK 8k4 Schrader variant. 2016-06-02 22:22:22 -07:00
Jared Boone
a52d0fbd81 Rename format_manchester/ManchesterFormatted to "[sS]ymbols". 2016-05-30 11:24:59 -07:00
Jared Boone
3d22222689 Extract DecodedSymbol from ManchesterDecoder. 2016-05-30 11:23:13 -07:00
furrtek
e15f659a6a RDS radiotext transmit (group 2A)
Keyboard/Unistroke text input method selection
2016-05-29 12:06:47 +02:00
Jared Boone
05b55f2696 TPMS: Extract packet readers. 2016-05-27 13:41:56 -07:00
furrtek
6a0816ba56 Added carrier wake up in Xylos TX and cute icons 2016-05-27 06:48:04 +02:00
Jared Boone
04c472e802 Push SignalType inside tpms::Packet. 2016-05-25 17:58:32 -07:00
Jared Boone
ff57b3c8cb Add Color-only constructor to ui::Rectangle widget. 2016-05-25 11:32:06 -07:00
Jared Boone
38b374506e More TPMS variable/enum renaming. 2016-05-23 18:02:25 -07:00
Jared Boone
05df04df7e TPMS: Quick implementation of "flags" column.
For now, shows only for Schrader OOK packets: top (left) nibble is function code, bottom nibble has two-bit checksum.
2016-05-17 14:23:03 -07:00
furrtek
7a90eab407 3MHz-wide fast close call works :) >3MHz doesn't work anymore :( 2016-05-17 20:27:51 +02:00
Jared Boone
40859444fe Update TPMS field handling for Schrader devices.
Thanks to mossmann for discovering these details.
2016-05-17 11:27:19 -07:00
Jared Boone
ad554b28b5 Rename TPMS clock recovery, packet builders for accuracy. 2016-05-17 11:11:30 -07:00
Jared Boone
682a1706a3 Improve File error handling. Massive effects...
API is somewhat stolen from Rust std::fs::File. Static factories didn't work out so well, though. Move semantics made my head explode.
TODO: Still a lot of places where errors aren't handled, but it's an improvement...
2016-05-16 14:01:44 -07:00
furrtek
e959d9a8ec More messagepack 2016-05-16 12:02:45 +02:00
furrtek
61fdb57b8f Testing Messagepack for saving/loading stuff from SD card 2016-05-15 02:35:08 +02:00
furrtek
7267de234d Added EPAR transmit (slow FSK), bit bug for now 2016-05-13 09:34:15 +02:00
furrtek
9149508c83 Improved close call precision 2016-05-13 01:18:04 +02:00
furrtek
7d193c3445 Close call tuning fix, more UI elements 2016-05-11 23:57:22 +02:00
furrtek
fb21c1332e Started close call dev 2016-05-11 12:45:03 +02:00
Jared Boone
b82eff51dd Refactor of capture buffer management between cores.
Instead of copying data into and out of FIFO, passing buffer pointers between cores that are sized to match preferred/ideal SD card write size.
2016-05-10 14:12:37 -07:00
furrtek
4511090eae Unistroke in dirty code 2016-05-10 04:24:19 +02:00
furrtek
569f299f42 Merge 2016-05-09 21:05:11 +02:00
furrtek
d40016ffda Fixed LCR and Xylos transmitters 2016-05-09 20:42:20 +02:00
Jared Boone
dc2944d5e9 Make Widget::screen_rect() const.
Because I can.
2016-05-08 14:59:26 -07:00
Jared Boone
ab73d6155e Improve arrow key next focus algorithm. 2016-05-08 14:59:03 -07:00
Jared Boone
0d6103916d Converge File object with std::fstream. Simplify LogFile.
LogFile no longer watches SD card presence and tries to open/close files dynamically.
2016-04-30 15:09:34 -07:00
furrtek
d55a420dfd Fixed module loading (again), only audio tx works for now 2016-04-28 14:59:14 +02:00
Jared Boone
dc8c34487f Speed dropped_percent() common case, ensure dropped>0 returns >0%. 2016-04-27 12:16:37 -07:00
Jared Boone
a72a3489cf Expose percent of data dropped during capture. 2016-04-27 12:04:02 -07:00
Jared Boone
1789868b8a Track bytes from baseband and dropped when entering capture FIFO. 2016-04-27 10:40:50 -07:00
Jared Boone
91ee2dbb67 Move FIFO and write size to CaptureConfig structure.
Now configured from baseband, where write size and appropriate FIFO size is known.
2016-04-26 22:26:30 -07:00
Jared Boone
ed3ac5249f Move MessageQueue::signal into .cpp file. 2016-04-23 22:00:27 -07:00
Jared Boone
d5e21ce972 Use CaptureConfig to share state between cores.
Remove awful FIFO_HACK.
TODO: Lots of repeated code...
TODO: Capture thread is signalled too frequently.
2016-04-23 15:07:44 -07:00
Jared Boone
7436dea51a Add CaptureConfig structure and message. 2016-04-23 14:54:15 -07:00
Jared Boone
27a1423309 De-constexpr a few UI constructors.
Because it was silly.
2016-04-22 11:18:35 -07:00
furrtek
2fcfdba9ea "At least it builds !" 2016-04-21 22:12:51 +02:00
furrtek
1b0da68d65 Merge remote-tracking branch 'upstream/master'
Conflicts:
	firmware/application/Makefile
	firmware/application/core_control.cpp
	firmware/application/touch.cpp
	firmware/application/ui_debug.cpp
	firmware/application/ui_debug.hpp
	firmware/application/ui_navigation.cpp
	firmware/baseband/baseband_thread.cpp
2016-04-21 20:36:19 +02:00
Jared Boone
59f1a32566 Semi-naive audio recording to SD card. 2016-04-11 10:20:19 -07:00
Jared Boone
c01f2d82e1 Move TPMS taps to dsp_fir_taps.hpp.
Will soon use in proc_record.cpp.
2016-04-11 10:18:31 -07:00
Jared Boone
f76750e55b Add LFSR random number generator.
Used for SD card write/read testing, maybe other stuff eventually?
2016-04-10 16:30:28 -07:00
Jared Boone
38ba02a68f Change File::open to File::open_for_writing.
Not thrilled about the File API right now...
2016-04-10 15:55:01 -07:00
Jared Boone
f8d496d9d1 Remove cpu_clock.* -- unused.
ClockManager does all that stuff.
2016-04-09 21:33:12 -07:00
Jared Boone
b35a8c4501 Add TPMS signal_type. 2016-04-06 17:04:40 -07:00
Jared Boone
635b1fd4c3 Extract TPMS packet stuff to separate files. 2016-04-06 17:01:54 -07:00
Jared Boone
b7c0efbb64 Add ERT commodity type. 2016-04-06 16:16:10 -07:00
Jared Boone
6571ef0c11 Prevent alternate MessageQueue constructors. 2016-02-27 21:20:16 -08:00
Jared Boone
0fae1488c4 Hide most of MessageQueue functions. 2016-02-27 21:19:51 -08:00
Jared Boone
bf348cf30a Move message handling loops to MessageQueue. 2016-02-27 21:07:11 -08:00
Jared Boone
eb294c8e1c Add chDbgPanic for unhandled exceptions. 2016-02-27 12:05:29 -08:00
Jared Boone
36c38e4a24 Quiet narrowing conversion warning. 2016-02-22 14:19:26 -08:00
Jared Boone
19609469a5 Quiet shift-overflow compiler warning. 2016-02-22 14:18:53 -08:00
Jared Boone
925394c54b Bodgy code to write PNG files the size of the LCD screen. 2016-02-19 15:33:27 -08:00
Jared Boone
77eb0c5d24 ILI9341 read_pixels().
Improves on / abstracts prior interface, which just handed back uint16_ts from the LCD's parallel interface.
2016-02-19 15:31:56 -08:00
Jared Boone
bdaa13c103 CRC, Adler32 interfaces accept void* blocks.
...despite my better judgement.
2016-02-19 15:30:35 -08:00
Jared Boone
6d0995e165 Function to read bytes from 16-bit LCD interface.
...begin careful not to overread from the LCD, or overwrite to the buffer.
2016-02-19 15:29:00 -08:00
Jared Boone
1f79c72bf0 Remove irrelevant comment from portapack::io. 2016-02-19 15:28:15 -08:00
Jared Boone
322a15587a Add ColorRGB888 type for data from LCD frame buffer. 2016-02-19 15:27:50 -08:00
Jared Boone
5ed76d6985 Adler32 implementation (for PNG writer). 2016-02-19 14:13:15 -08:00
Jared Boone
daeb542086 Remove constexpr use of std::log2, std::log10.
GCC 4.9 doesn't care for it.
2016-02-19 10:30:26 -08:00